DE68919211D1 - Empfänger für seriellen Daten. - Google Patents
Empfänger für seriellen Daten.Info
- Publication number
- DE68919211D1 DE68919211D1 DE68919211T DE68919211T DE68919211D1 DE 68919211 D1 DE68919211 D1 DE 68919211D1 DE 68919211 T DE68919211 T DE 68919211T DE 68919211 T DE68919211 T DE 68919211T DE 68919211 D1 DE68919211 D1 DE 68919211D1
- Authority
- DE
- Germany
- Prior art keywords
- serial data
- data receiver
- receiver
- serial
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
- G06F5/08—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations, the intermediate ones not being accessible for either enqueue or dequeue operations, e.g. using a shift register
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M9/00—Parallel/series conversion or vice versa
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/068—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection by sampling faster than the nominal bit rate
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
- H04L7/042—Detectors therefor, e.g. correlators, state machines
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Dc Digital Transmission (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP89303070A EP0389697B1 (de) | 1989-03-29 | 1989-03-29 | Empfänger für seriellen Daten |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68919211D1 true DE68919211D1 (de) | 1994-12-08 |
DE68919211T2 DE68919211T2 (de) | 1995-05-11 |
Family
ID=8202629
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68919211T Expired - Lifetime DE68919211T2 (de) | 1989-03-29 | 1989-03-29 | Empfänger für seriellen Daten. |
Country Status (4)
Country | Link |
---|---|
US (1) | US5003308A (de) |
EP (1) | EP0389697B1 (de) |
JP (1) | JPH0777372B2 (de) |
DE (1) | DE68919211T2 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5287359A (en) * | 1991-04-08 | 1994-02-15 | Digital Equipment Corporation | Synchronous decoder for self-clocking signals |
US5414721A (en) * | 1991-05-29 | 1995-05-09 | Sharp Kabushiki Kaisha | Serial data receiving device |
US6262993B1 (en) | 1996-11-08 | 2001-07-17 | Kevin Kirmse | Computer and peripheral networking device permitting the practical use of buffer insertion-based networks while communicating over unshielded twisted pair conductive media |
DE10101718C1 (de) * | 2001-01-15 | 2002-06-06 | Infineon Technologies Ag | Datenempfangsschaltung |
US7447965B2 (en) * | 2005-05-03 | 2008-11-04 | Agere Systems Inc. | Offset test pattern apparatus and method |
US7466247B1 (en) | 2007-10-04 | 2008-12-16 | Lecroy Corporation | Fractional-decimation signal processing |
US10229081B2 (en) | 2016-09-26 | 2019-03-12 | Dell Products, Lp | System level crosstalk mitigation |
US10660197B2 (en) | 2018-07-20 | 2020-05-19 | Dell Products L.P. | Differential pair group equalization system |
CN113924738A (zh) * | 2019-04-12 | 2022-01-11 | 迈凌有限公司 | 用于nrz调制光纤传输的电双二进制软信息接收器 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2167259B1 (de) * | 1972-01-11 | 1976-06-11 | Thomson Csf | |
US4012598A (en) * | 1976-01-14 | 1977-03-15 | Bell Telephone Laboratories, Incorporated | Method and means for pulse receiver synchronization |
NL7807503A (nl) * | 1977-07-14 | 1979-01-16 | Indep Broadcasting Authority | Transmissie en/of registratie van digitale signalen. |
IT1108564B (it) * | 1978-04-11 | 1985-12-09 | Olivetti C Ing E C Spa | Dispositivo digitale sincronizzatore e demodulatore di segnali codificati di frequenza |
JPS56140451A (en) * | 1980-03-31 | 1981-11-02 | Hitachi Ltd | Log information holding device |
US4833471A (en) * | 1984-03-26 | 1989-05-23 | Canon Kabushiki Kaisha | Data processing apparatus |
JP2590069B2 (ja) * | 1986-07-23 | 1997-03-12 | 株式会社日立製作所 | 時分割スイッチ |
JPS6350139A (ja) * | 1986-08-20 | 1988-03-03 | Canon Inc | シ−ケンス信号発生装置 |
JPS6376640A (ja) * | 1986-09-19 | 1988-04-06 | Nec Corp | 調歩同期信号受信回路 |
JPS6429122A (en) * | 1987-07-24 | 1989-01-31 | Omron Tateisi Electronics Co | Parallel/serial converting circuit |
US4901076A (en) * | 1987-10-29 | 1990-02-13 | International Business Machines Corporation | Circuit for converting between serial and parallel data streams by high speed addressing |
-
1989
- 1989-03-29 DE DE68919211T patent/DE68919211T2/de not_active Expired - Lifetime
- 1989-03-29 EP EP89303070A patent/EP0389697B1/de not_active Expired - Lifetime
-
1990
- 1990-03-20 JP JP6851490A patent/JPH0777372B2/ja not_active Expired - Lifetime
- 1990-03-28 US US07/501,449 patent/US5003308A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0777372B2 (ja) | 1995-08-16 |
EP0389697A3 (en) | 1990-10-24 |
EP0389697A2 (de) | 1990-10-03 |
JPH02285832A (ja) | 1990-11-26 |
EP0389697B1 (de) | 1994-11-02 |
DE68919211T2 (de) | 1995-05-11 |
US5003308A (en) | 1991-03-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8330 | Complete disclaimer |