DE68914060D1 - Bipolares ram mit zustandsabhängigem schreibstrom. - Google Patents
Bipolares ram mit zustandsabhängigem schreibstrom.Info
- Publication number
- DE68914060D1 DE68914060D1 DE89902477T DE68914060T DE68914060D1 DE 68914060 D1 DE68914060 D1 DE 68914060D1 DE 89902477 T DE89902477 T DE 89902477T DE 68914060 T DE68914060 T DE 68914060T DE 68914060 D1 DE68914060 D1 DE 68914060D1
- Authority
- DE
- Germany
- Prior art keywords
- write current
- conditional write
- bipolar ram
- bipolar
- ram
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
- G11C11/416—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
- G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/155,021 US4853898A (en) | 1988-02-11 | 1988-02-11 | Bipolar ram having state dependent write current |
PCT/US1989/000565 WO1989007827A1 (en) | 1988-02-11 | 1989-02-13 | Bipolar ram having state dependent write current |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68914060D1 true DE68914060D1 (de) | 1994-04-28 |
DE68914060T2 DE68914060T2 (de) | 1994-10-06 |
Family
ID=22553813
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68914060T Expired - Fee Related DE68914060T2 (de) | 1988-02-11 | 1989-02-13 | Bipolares ram mit zustandsabhängigem schreibstrom. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4853898A (de) |
EP (1) | EP0354950B1 (de) |
JP (1) | JPH02501605A (de) |
DE (1) | DE68914060T2 (de) |
WO (1) | WO1989007827A1 (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02239496A (ja) * | 1989-03-13 | 1990-09-21 | Fujitsu Ltd | 半導体記憶装置 |
US5179538A (en) * | 1989-06-30 | 1993-01-12 | The Boeing Company | Memory system including CMOS memory cells and bipolar sensing circuit |
DE69015371T2 (de) * | 1990-05-17 | 1995-07-13 | Ibm | Lese-/schreibe-/wiederherstellungsschaltung für speichermatrizen. |
JP3965287B2 (ja) * | 2001-10-09 | 2007-08-29 | シャープ株式会社 | 不揮発性半導体記憶装置およびその書き込み時間決定方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55105890A (en) * | 1979-01-31 | 1980-08-13 | Fujitsu Ltd | Memory control system |
JPS564263A (en) * | 1979-06-25 | 1981-01-17 | Hitachi Ltd | Semiconductor memory |
FR2460460A1 (fr) * | 1979-06-28 | 1981-01-23 | Rivoire Jacques | Dispositif cryogenique stable et precis |
JPS5788592A (en) * | 1980-11-21 | 1982-06-02 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor storage circuit device |
JPS57164489A (en) * | 1981-03-31 | 1982-10-09 | Fujitsu Ltd | Semicondutor memory |
US4742488A (en) * | 1982-10-25 | 1988-05-03 | Advanced Micro Devices, Inc. | Sense amplifier/write circuit for semiconductor memories |
JPS59151386A (ja) * | 1983-01-31 | 1984-08-29 | Fujitsu Ltd | 半導体記憶装置 |
JPS6066388A (ja) * | 1983-09-22 | 1985-04-16 | Fujitsu Ltd | 半導体記憶装置 |
US4570238A (en) * | 1985-06-24 | 1986-02-11 | Motorola, Inc. | Selectable write current source for bipolar rams |
-
1988
- 1988-02-11 US US07/155,021 patent/US4853898A/en not_active Expired - Lifetime
-
1989
- 1989-02-13 WO PCT/US1989/000565 patent/WO1989007827A1/en active IP Right Grant
- 1989-02-13 EP EP89902477A patent/EP0354950B1/de not_active Expired - Lifetime
- 1989-02-13 DE DE68914060T patent/DE68914060T2/de not_active Expired - Fee Related
- 1989-02-13 JP JP1502309A patent/JPH02501605A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
DE68914060T2 (de) | 1994-10-06 |
WO1989007827A1 (en) | 1989-08-24 |
EP0354950B1 (de) | 1994-03-23 |
US4853898A (en) | 1989-08-01 |
EP0354950A4 (en) | 1991-03-20 |
JPH02501605A (ja) | 1990-05-31 |
EP0354950A1 (de) | 1990-02-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |