DE60303187D1 - Verbesserung der Verfahren zur Kompensierung des Phasenfehlers in einem Fraktional-N Phasenregelschleife-Frequenzsynthesizer - Google Patents

Verbesserung der Verfahren zur Kompensierung des Phasenfehlers in einem Fraktional-N Phasenregelschleife-Frequenzsynthesizer

Info

Publication number
DE60303187D1
DE60303187D1 DE60303187T DE60303187T DE60303187D1 DE 60303187 D1 DE60303187 D1 DE 60303187D1 DE 60303187 T DE60303187 T DE 60303187T DE 60303187 T DE60303187 T DE 60303187T DE 60303187 D1 DE60303187 D1 DE 60303187D1
Authority
DE
Germany
Prior art keywords
fractional
compensating
improvement
locked loop
frequency synthesizer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60303187T
Other languages
English (en)
Inventor
Guido Gabriele Albasini
Milani Enrico Temporiti
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE60303187D1 publication Critical patent/DE60303187D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
DE60303187T 2003-03-14 2003-03-14 Verbesserung der Verfahren zur Kompensierung des Phasenfehlers in einem Fraktional-N Phasenregelschleife-Frequenzsynthesizer Expired - Lifetime DE60303187D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP03425155A EP1458100B1 (de) 2003-03-14 2003-03-14 Verbesserung der Verfahren zur Kompensierung des Phasenfehlers in einem Fraktional-N Phasenregelschleife-Frequenzsynthesizer

Publications (1)

Publication Number Publication Date
DE60303187D1 true DE60303187D1 (de) 2006-04-06

Family

ID=32749064

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60303187T Expired - Lifetime DE60303187D1 (de) 2003-03-14 2003-03-14 Verbesserung der Verfahren zur Kompensierung des Phasenfehlers in einem Fraktional-N Phasenregelschleife-Frequenzsynthesizer

Country Status (3)

Country Link
US (1) US6960947B2 (de)
EP (1) EP1458100B1 (de)
DE (1) DE60303187D1 (de)

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Publication number Priority date Publication date Assignee Title
DE60302543D1 (de) * 2003-03-14 2006-01-05 St Microelectronics Srl Fraktional-Phasenregelschleife
JP4387172B2 (ja) * 2003-12-02 2009-12-16 株式会社リコー 電源回路及びその電源回路の出力電圧変更方法
US7205798B1 (en) * 2004-05-28 2007-04-17 Intersil Americas Inc. Phase error correction circuit for a high speed frequency synthesizer
US20060255863A1 (en) * 2005-05-11 2006-11-16 Comlent Holdings, Inc. Charge pump compensation techniques for sigma-delta fractional-N synthesizer
US7999623B2 (en) * 2005-12-05 2011-08-16 Realtek Semiconductor Corp. Digital fractional-N phase lock loop and method thereof
US7498856B2 (en) * 2005-12-05 2009-03-03 Realtek Semiconductor Corporation Fractional-N frequency synthesizer
US7916824B2 (en) * 2006-08-18 2011-03-29 Texas Instruments Incorporated Loop bandwidth enhancement technique for a digital PLL and a HF divider that enables this technique
GB0804338D0 (en) * 2008-03-07 2008-04-16 Cambridge Silicon Radio Ltd Phase-locked loop
GB0804340D0 (en) * 2008-03-07 2008-04-16 Cambridge Silicon Radio Ltd Charge pump for a phase-locked loop
GB0804337D0 (en) 2008-03-07 2008-04-16 Cambridge Silicon Radio Ltd Dual phase detector phase-locked loop
GB0804342D0 (en) * 2008-03-07 2008-04-16 Cambridge Silicon Radio Ltd Charge transfer in a phase-locked loop
GB0804339D0 (en) * 2008-03-07 2008-04-16 Cambridge Silicon Radio Ltd Phase-locked loop
GB0804341D0 (en) * 2008-03-07 2008-04-16 Cambridge Silicon Radio Ltd Charge pump for a phase-locked loop
US7750750B2 (en) * 2008-04-04 2010-07-06 Broadcom Corporation Enhanced polar modulator for transmitter
TWI376877B (en) * 2008-12-26 2012-11-11 Ind Tech Res Inst Clock generator and multimodulus frequency divider and delta-sigma modulator thereof
EP2396887A4 (de) * 2009-02-13 2012-08-29 Freescale Semiconductor Inc Integrierte schaltung mit frequenzerzeugungsschaltkreisen zur steuerung einer frequenzquelle
US20110037523A1 (en) * 2009-08-11 2011-02-17 Texas Instruments Incorporated Charge pump linearization for delta-sigma fractional-n phase locked loops
US8193845B2 (en) * 2010-07-06 2012-06-05 Microchip Technology Incorporated Binary-weighted delta-sigma fractional-N frequency synthesizer with digital-to-analog differentiators canceling quantization noise
US8618967B2 (en) * 2012-03-30 2013-12-31 Broadcom Corporation Systems, circuits, and methods for a sigma-delta based time to digital converter
US8988121B2 (en) 2013-05-20 2015-03-24 Qualcomm Incoporated Method and apparatus for generating a reference signal for a fractional-N frequency synthesizer
CN103414469A (zh) * 2013-06-27 2013-11-27 深圳市创成微电子有限公司 一种rfid小数分频pll技术
US9685960B2 (en) * 2014-07-31 2017-06-20 Valeo Radar Systems, Inc. Method and apparatus for generating a bit stream signal having a reduced output swing
US10141943B1 (en) * 2018-02-21 2018-11-27 Teledyne Defense Electronics, Llc High speed acquisition system for phase locked loops
US10291389B1 (en) * 2018-03-16 2019-05-14 Stmicroelectronics International N.V. Two-point modulator with matching gain calibration
CN108964660B (zh) * 2018-07-19 2024-02-06 重庆湃芯创智微电子有限公司 一种基于相位延时补偿的高分辨率低功耗展频控制电路
US10686455B1 (en) 2019-08-14 2020-06-16 Teledyne Defense Electronics, Llc Digital high speed acquisition system for phase locked loops
WO2021056451A1 (zh) * 2019-09-27 2021-04-01 华为技术有限公司 一种集成公共时钟锁相环的无线收发装置
CN111551771A (zh) * 2020-04-02 2020-08-18 垣矽技术(青岛)有限公司 If芯片及其数字补偿方法
CN111796252B (zh) * 2020-08-28 2023-05-30 西安电子科技大学 基于四通道相参融合的全极化mimo雷达目标检测方法
CN117254805A (zh) * 2023-11-20 2023-12-19 深圳市华普微电子股份有限公司 一种sub-1g全频覆盖频率综合电路

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DK105057A (de)
US3959737A (en) * 1974-11-18 1976-05-25 Engelmann Microwave Co. Frequency synthesizer having fractional frequency divider in phase-locked loop
GB2097206B (en) * 1981-04-21 1985-03-13 Marconi Co Ltd Frequency synthesisers
FR2511564A1 (fr) * 1981-08-17 1983-02-18 Thomson Csf Synthetiseur de frequences a division fractionnaire, utilise pour une modulation angulaire numerique
AU6339594A (en) * 1993-06-09 1994-12-15 Alcatel N.V. Synchronized clock
US6236275B1 (en) * 1997-10-24 2001-05-22 Ericsson Inc. Digital frequency synthesis by sequential fraction approximations
CA2233831A1 (en) * 1998-03-31 1999-09-30 Tom Riley Digital-sigma fractional-n synthesizer
DE10105057C2 (de) * 2001-02-05 2003-06-18 Infineon Technologies Ag Sigma-Delta Programmiereinrichtung für Pll-Frequenzsynthesizer und Verfahren zum Programmieren einer programmierbaren Einrichtung

Also Published As

Publication number Publication date
US6960947B2 (en) 2005-11-01
US20040232960A1 (en) 2004-11-25
EP1458100B1 (de) 2006-01-11
EP1458100A1 (de) 2004-09-15

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