DE60301295D1 - Verfahren zur Herstellung einer sub-lithographischen Durchgangsleitung - Google Patents
Verfahren zur Herstellung einer sub-lithographischen DurchgangsleitungInfo
- Publication number
- DE60301295D1 DE60301295D1 DE60301295T DE60301295T DE60301295D1 DE 60301295 D1 DE60301295 D1 DE 60301295D1 DE 60301295 T DE60301295 T DE 60301295T DE 60301295 T DE60301295 T DE 60301295T DE 60301295 D1 DE60301295 D1 DE 60301295D1
- Authority
- DE
- Germany
- Prior art keywords
- sub
- producing
- transmission line
- lithographic
- lithographic transmission
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0338—Process specially adapted to improve the resolution of the mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/947—Subphotolithographic processing
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Inorganic Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US133605 | 1998-08-13 | ||
US10/133,605 US6673714B2 (en) | 2002-04-25 | 2002-04-25 | Method of fabricating a sub-lithographic sized via |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60301295D1 true DE60301295D1 (de) | 2005-09-22 |
DE60301295T2 DE60301295T2 (de) | 2006-08-10 |
Family
ID=29215620
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60301295T Expired - Lifetime DE60301295T2 (de) | 2002-04-25 | 2003-04-22 | Verfahren zur Herstellung einer sub-lithographischen Durchgangsleitung |
Country Status (5)
Country | Link |
---|---|
US (1) | US6673714B2 (de) |
EP (1) | EP1359609B1 (de) |
JP (1) | JP2003338458A (de) |
CN (1) | CN1453640A (de) |
DE (1) | DE60301295T2 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6916511B2 (en) * | 2002-10-24 | 2005-07-12 | Hewlett-Packard Development Company, L.P. | Method of hardening a nano-imprinting stamp |
US7384727B2 (en) * | 2003-06-26 | 2008-06-10 | Micron Technology, Inc. | Semiconductor processing patterning methods |
US6969677B2 (en) * | 2003-10-20 | 2005-11-29 | Micron Technology, Inc. | Methods of forming conductive metal silicides by reaction of metal with silicon |
US7026243B2 (en) * | 2003-10-20 | 2006-04-11 | Micron Technology, Inc. | Methods of forming conductive material silicides by reaction of metal with silicon |
US7462292B2 (en) * | 2004-01-27 | 2008-12-09 | Hewlett-Packard Development Company, L.P. | Silicon carbide imprint stamp |
US7060625B2 (en) * | 2004-01-27 | 2006-06-13 | Hewlett-Packard Development Company, L.P. | Imprint stamp |
US7153769B2 (en) * | 2004-04-08 | 2006-12-26 | Micron Technology, Inc. | Methods of forming a reaction product and methods of forming a conductive metal silicide by reaction of metal with silicon |
US7241705B2 (en) * | 2004-09-01 | 2007-07-10 | Micron Technology, Inc. | Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects |
DE102005008478B3 (de) | 2005-02-24 | 2006-10-26 | Infineon Technologies Ag | Verfahren zur Herstellung von sublithographischen Strukturen |
KR100869359B1 (ko) * | 2006-09-28 | 2008-11-19 | 주식회사 하이닉스반도체 | 반도체 소자의 리세스 게이트 제조 방법 |
JP5349404B2 (ja) * | 2010-05-28 | 2013-11-20 | 株式会社東芝 | パターン形成方法 |
NL2007452A (en) * | 2010-12-08 | 2012-06-11 | Asml Holding Nv | Electrostatic clamp, lithographic apparatus and method of manufacturing an electrostatic clamp. |
JP6898031B2 (ja) * | 2015-12-30 | 2021-07-07 | フジフイルム エレクトロニック マテリアルズ ユー.エス.エー., インコーポレイテッド | 感光性積層構造体 |
CN109065445B (zh) * | 2018-07-13 | 2020-10-09 | 上海华力集成电路制造有限公司 | 金属栅极结构的制造方法 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58130575A (ja) * | 1982-01-29 | 1983-08-04 | Hitachi Ltd | 電界効果トランジスタの製造方法 |
JPS6229175A (ja) * | 1985-07-29 | 1987-02-07 | Nippon Telegr & Teleph Corp <Ntt> | 電界効果型トランジスタの製造方法 |
US4670090A (en) * | 1986-01-23 | 1987-06-02 | Rockwell International Corporation | Method for producing a field effect transistor |
DE3685495D1 (de) * | 1986-07-11 | 1992-07-02 | Ibm | Verfahren zur herstellung einer unteraetzten maskenkontur. |
US4711701A (en) * | 1986-09-16 | 1987-12-08 | Texas Instruments Incorporated | Self-aligned transistor method |
US4808545A (en) * | 1987-04-20 | 1989-02-28 | International Business Machines Corporation | High speed GaAs MESFET having refractory contacts and a self-aligned cold gate fabrication process |
DE3879186D1 (de) * | 1988-04-19 | 1993-04-15 | Ibm | Verfahren zur herstellung von integrierten halbleiterstrukturen welche feldeffekttransistoren mit kanallaengen im submikrometerbereich enthalten. |
KR910005400B1 (ko) * | 1988-09-05 | 1991-07-29 | 재단법인 한국전자통신연구소 | 다층레지스트를 이용한 자기정합형 갈륨비소 전계효과트랜지스터의 제조방법 |
JPH06267843A (ja) * | 1993-03-10 | 1994-09-22 | Hitachi Ltd | パターン形成方法 |
KR0146246B1 (ko) * | 1994-09-26 | 1998-11-02 | 김주용 | 반도체 소자 콘택 제조방법 |
US5976920A (en) * | 1996-07-22 | 1999-11-02 | The United States Of America As Represented By The Secretary Of The Air Force | Single layer integrated metal process for high electron mobility transistor (HEMT) and pseudomorphic high electron mobility transistor (PHEMT) |
US6036875A (en) * | 1997-02-20 | 2000-03-14 | Advanced Micro Devices, Inc. | Method for manufacturing a semiconductor device with ultra-fine line geometry |
-
2002
- 2002-04-25 US US10/133,605 patent/US6673714B2/en not_active Expired - Lifetime
-
2003
- 2003-04-04 JP JP2003101055A patent/JP2003338458A/ja active Pending
- 2003-04-22 DE DE60301295T patent/DE60301295T2/de not_active Expired - Lifetime
- 2003-04-22 EP EP03252512A patent/EP1359609B1/de not_active Expired - Lifetime
- 2003-04-25 CN CN03122426A patent/CN1453640A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
US20030211729A1 (en) | 2003-11-13 |
JP2003338458A (ja) | 2003-11-28 |
EP1359609A3 (de) | 2004-03-31 |
EP1359609A2 (de) | 2003-11-05 |
DE60301295T2 (de) | 2006-08-10 |
CN1453640A (zh) | 2003-11-05 |
US6673714B2 (en) | 2004-01-06 |
EP1359609B1 (de) | 2005-08-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE60307157D1 (de) | Verfahren zur Herstellung einer Halbleitervorrichtung | |
DE60321883D1 (de) | Verfahren zur Herstellung einer Vorrichtung | |
DE60218802D1 (de) | Verfahren zur Herstellung einer Vorrichtung | |
DE60125755D1 (de) | Verfahren zur herstellung einer flexodruckplatte | |
DE60215762D1 (de) | Verfahren zur Herstellung einer Mehrfachlodplatte | |
DE602004007861D1 (de) | Verfahren zur Herstellung einer Vorrichtung zur drahtlosen Kommunikation | |
DE60203426D1 (de) | Verfahren zur Herstellung einer Anzeigevorrichtung | |
DE60327616D1 (de) | Verfahren zur herstellung einer wabenstruktur | |
DE60323051D1 (de) | Verfahren zur Herstellung einer Vorrichtung | |
ATA20032001A (de) | Verfahren zur herstellung einer wasserkraftanlage | |
DE60300839D1 (de) | Verfahren zur Herstellung einer Büchse | |
DE60239830D1 (de) | Verfahren zur herstellung einer hitzebeständigen stahlfeder | |
DE502005006608D1 (de) | Verfahren zur herstellung einer steckverbindung | |
DE60239472D1 (de) | Verfahren zur herstellung einer anzeigeeinrichtung | |
DE60301295D1 (de) | Verfahren zur Herstellung einer sub-lithographischen Durchgangsleitung | |
DE60223328D1 (de) | Verfahren zur Herstellung einer Halbleiteranordnung | |
DE60215484D1 (de) | Verfahren zur herstellung einer flanschverbindung | |
DE50306958D1 (de) | Verfahren zur herstellung einer bondverbindung | |
DE502004012455D1 (de) | Verfahren zur Herstellung einer Lötstoppbarriere | |
DE60134220D1 (de) | Verfahren zur herstellung einer heteroübergang-bicmos-integrierter schaltung | |
DE502004005650D1 (de) | Verfahren zur herstellung einer gleitfläche | |
DE60235799D1 (de) | Verfahren zur herstellung einer zündkerze | |
DE60212346D1 (de) | Verfahren zur herstellung einer fahrzeugtür | |
DE50212601D1 (de) | Verfahren zur herstellung einer brenneranlage | |
DE60209065D1 (de) | Verfahren zur Herstellung einer Halbleitervorrichtung |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8327 | Change in the person/name/address of the patent owner |
Owner name: HEWLETT-PACKARD DEVELOPMENT CO., L.P., HOUSTON, TE |
|
8364 | No opposition during term of opposition |