DE60234450D1 - Cmos bauelemente mit doppelter schicht - Google Patents

Cmos bauelemente mit doppelter schicht

Info

Publication number
DE60234450D1
DE60234450D1 DE60234450T DE60234450T DE60234450D1 DE 60234450 D1 DE60234450 D1 DE 60234450D1 DE 60234450 T DE60234450 T DE 60234450T DE 60234450 T DE60234450 T DE 60234450T DE 60234450 D1 DE60234450 D1 DE 60234450D1
Authority
DE
Germany
Prior art keywords
layer
distal
proximal
channel
double layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60234450T
Other languages
English (en)
Inventor
Eugene A Fitzgerald
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Amber Wave Systems Inc
Original Assignee
Amber Wave Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Amber Wave Systems Inc filed Critical Amber Wave Systems Inc
Application granted granted Critical
Publication of DE60234450D1 publication Critical patent/DE60234450D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1054—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Thin Film Transistor (AREA)
  • Medicines Containing Material From Animals Or Micro-Organisms (AREA)
  • Fats And Perfumes (AREA)
DE60234450T 2001-08-09 2002-08-09 Cmos bauelemente mit doppelter schicht Expired - Lifetime DE60234450D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US3118801P 2001-08-09 2001-08-09
PCT/US2002/025286 WO2003015160A2 (en) 2001-08-09 2002-08-09 Dual layer cmos devices

Publications (1)

Publication Number Publication Date
DE60234450D1 true DE60234450D1 (de) 2009-12-31

Family

ID=32092164

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60234450T Expired - Lifetime DE60234450D1 (de) 2001-08-09 2002-08-09 Cmos bauelemente mit doppelter schicht

Country Status (5)

Country Link
EP (1) EP1415337B1 (de)
JP (1) JP2004538639A (de)
AT (1) ATE449420T1 (de)
DE (1) DE60234450D1 (de)
WO (1) WO2003015160A2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100401528C (zh) * 2002-01-23 2008-07-09 斯平内克半导体股份有限公司 具有与应变半导体基片形成肖特基或肖特基类接触的源极和/或漏极的场效应晶体管
US6909186B2 (en) * 2003-05-01 2005-06-21 International Business Machines Corporation High performance FET devices and methods therefor
FR2868209B1 (fr) * 2004-03-25 2006-06-16 Commissariat Energie Atomique Transistor a effet de champ a canal en carbone diamant
US7244958B2 (en) * 2004-06-24 2007-07-17 International Business Machines Corporation Integration of strained Ge into advanced CMOS technology
KR102069275B1 (ko) 2013-06-07 2020-01-22 삼성전자주식회사 변형된 채널층을 갖는 반도체 소자 및 그 제조 방법

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5155571A (en) * 1990-08-06 1992-10-13 The Regents Of The University Of California Complementary field effect transistors having strained superlattice structure
US5534713A (en) * 1994-05-20 1996-07-09 International Business Machines Corporation Complementary metal-oxide semiconductor transistor logic using strained SI/SIGE heterostructure layers
JP3372158B2 (ja) * 1996-02-09 2003-01-27 株式会社東芝 半導体装置及びその製造方法
DE19720008A1 (de) * 1997-05-13 1998-11-19 Siemens Ag Integrierte CMOS-Schaltungsanordnung und Verfahren zu deren Herstellung
JP3403076B2 (ja) * 1998-06-30 2003-05-06 株式会社東芝 半導体装置及びその製造方法
JP4521542B2 (ja) * 1999-03-30 2010-08-11 ルネサスエレクトロニクス株式会社 半導体装置および半導体基板
US6339232B1 (en) * 1999-09-20 2002-01-15 Kabushika Kaisha Toshiba Semiconductor device
JP2001160594A (ja) * 1999-09-20 2001-06-12 Toshiba Corp 半導体装置
JP4226175B2 (ja) * 1999-12-10 2009-02-18 富士通株式会社 半導体装置およびその製造方法

Also Published As

Publication number Publication date
EP1415337B1 (de) 2009-11-18
JP2004538639A (ja) 2004-12-24
ATE449420T1 (de) 2009-12-15
WO2003015160A3 (en) 2003-12-04
WO2003015160A2 (en) 2003-02-20
EP1415337A2 (de) 2004-05-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition