DE602006021019D1 - Mikroprozessor mit automatischer auswahl eines smid-parallelismus - Google Patents

Mikroprozessor mit automatischer auswahl eines smid-parallelismus

Info

Publication number
DE602006021019D1
DE602006021019D1 DE602006021019T DE602006021019T DE602006021019D1 DE 602006021019 D1 DE602006021019 D1 DE 602006021019D1 DE 602006021019 T DE602006021019 T DE 602006021019T DE 602006021019 T DE602006021019 T DE 602006021019T DE 602006021019 D1 DE602006021019 D1 DE 602006021019D1
Authority
DE
Germany
Prior art keywords
mode
parallel
logic
parallelism
full width
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602006021019T
Other languages
English (en)
Inventor
Kenneth Alan Dockser
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of DE602006021019D1 publication Critical patent/DE602006021019D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/20—Cooling means
    • G06F1/206—Cooling means comprising thermal management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017—Runtime instruction translation, e.g. macros
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30189—Instruction operation extension or modification according to execution mode, e.g. mode flag
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Power Sources (AREA)
  • Advance Control (AREA)
  • Electrophonic Musical Instruments (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
DE602006021019T 2005-06-09 2006-05-25 Mikroprozessor mit automatischer auswahl eines smid-parallelismus Active DE602006021019D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/150,729 US7836284B2 (en) 2005-06-09 2005-06-09 Microprocessor with automatic selection of processing parallelism mode based on width data of instructions
PCT/US2006/020614 WO2006135554A2 (en) 2005-06-09 2006-05-25 Microprocessor with automatic selection of simd parallelism

Publications (1)

Publication Number Publication Date
DE602006021019D1 true DE602006021019D1 (de) 2011-05-12

Family

ID=37525522

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006021019T Active DE602006021019D1 (de) 2005-06-09 2006-05-25 Mikroprozessor mit automatischer auswahl eines smid-parallelismus

Country Status (11)

Country Link
US (1) US7836284B2 (de)
EP (2) EP1894091B1 (de)
JP (1) JP5074389B2 (de)
KR (1) KR101006030B1 (de)
CN (1) CN100595730C (de)
AT (1) ATE504038T1 (de)
DE (1) DE602006021019D1 (de)
ES (2) ES2389946T3 (de)
IL (1) IL187805A0 (de)
MX (1) MX2007015555A (de)
WO (1) WO2006135554A2 (de)

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US7694114B2 (en) 2005-06-09 2010-04-06 Qualcomm Incorporated Software selectable adjustment of SIMD parallelism
US8049760B2 (en) * 2006-02-06 2011-11-01 Via Technologies, Inc. System and method for vector computations in arithmetic logic units (ALUs)
TWI361379B (en) * 2006-02-06 2012-04-01 Via Tech Inc Dual mode floating point multiply accumulate unit
US7836316B2 (en) * 2006-03-28 2010-11-16 Intel Corporation Conserving power in processing systems
US8345053B2 (en) * 2006-09-21 2013-01-01 Qualcomm Incorporated Graphics processors with parallel scheduling and execution of threads
US9135017B2 (en) * 2007-01-16 2015-09-15 Ati Technologies Ulc Configurable shader ALU units
US8108845B2 (en) * 2007-02-14 2012-01-31 The Mathworks, Inc. Parallel programming computing system to dynamically allocate program portions
US7868479B2 (en) * 2007-06-27 2011-01-11 Qualcomm Incorporated Power gating for multimedia processing power management
US8325184B2 (en) * 2007-09-14 2012-12-04 Qualcomm Incorporated Fragment shader bypass in a graphics processing unit, and apparatus and method thereof
US8335501B1 (en) 2007-11-21 2012-12-18 At&T Mobility Ii Llc Controlling functions of mobile communications devices
JP4996654B2 (ja) * 2009-08-18 2012-08-08 株式会社東芝 プロセッサ
US9501705B2 (en) * 2009-12-15 2016-11-22 Micron Technology, Inc. Methods and apparatuses for reducing power consumption in a pattern recognition processor
US9235251B2 (en) * 2010-01-11 2016-01-12 Qualcomm Incorporated Dynamic low power mode implementation for computing devices
US8504855B2 (en) 2010-01-11 2013-08-06 Qualcomm Incorporated Domain specific language, compiler and JIT for dynamic power management
WO2012009252A2 (en) * 2010-07-13 2012-01-19 Advanced Micro Devices, Inc. Dynamic control of simds
CN101969402B (zh) * 2010-10-18 2012-05-23 浪潮集团山东通用软件有限公司 基于并行处理的数据交换方法
US20120216011A1 (en) * 2011-02-18 2012-08-23 Darryl Gove Apparatus and method of single-instruction, multiple-data vector operation masking
GB2505818B (en) * 2011-06-16 2016-02-10 Imagination Tech Ltd Graphics processor with non-blocking concurrent architecture
US9009451B2 (en) * 2011-10-31 2015-04-14 Apple Inc. Instruction type issue throttling upon reaching threshold by adjusting counter increment amount for issued cycle and decrement amount for not issued cycle
US9691360B2 (en) 2012-02-21 2017-06-27 Apple Inc. Alpha channel power savings in graphics unit
CN103513958B (zh) * 2012-06-27 2017-01-25 上海芯豪微电子有限公司 高性能指令缓存系统和方法
US10732689B2 (en) 2013-07-09 2020-08-04 Texas Instruments Incorporated Controlling the number of powered vector lanes via a register field
US10175981B2 (en) 2013-07-09 2019-01-08 Texas Instruments Incorporated Method to control the number of active vector lanes for power efficiency
GB2539038B (en) * 2015-06-05 2020-12-23 Advanced Risc Mach Ltd Processing pipeline with first and second processing modes having different performance or energy consumption characteristics
US9841997B2 (en) * 2015-06-25 2017-12-12 Intel Corporation Method and apparatus for execution mode selection
US10091904B2 (en) * 2016-07-22 2018-10-02 Intel Corporation Storage sled for data center
WO2018228399A1 (zh) * 2017-06-13 2018-12-20 上海寒武纪信息科技有限公司 运算装置和方法
US11493967B2 (en) * 2018-06-01 2022-11-08 Interdigital Madison Patent Holdings, Sas Thermal shutdown with hysteresis
US10996960B1 (en) * 2019-11-22 2021-05-04 Blaize, Inc. Iterating single instruction, multiple-data (SIMD) instructions
US11307860B1 (en) 2019-11-22 2022-04-19 Blaize, Inc. Iterating group sum of multiple accumulate operations
US11029958B1 (en) * 2019-12-28 2021-06-08 Intel Corporation Apparatuses, methods, and systems for configurable operand size operations in an operation configurable spatial accelerator

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Also Published As

Publication number Publication date
EP2290527A2 (de) 2011-03-02
EP1894091B1 (de) 2011-03-30
CN100595730C (zh) 2010-03-24
WO2006135554A3 (en) 2007-12-13
EP1894091A2 (de) 2008-03-05
EP2290527A3 (de) 2011-03-16
CN101228504A (zh) 2008-07-23
MX2007015555A (es) 2008-02-21
US7836284B2 (en) 2010-11-16
EP2290527B1 (de) 2012-07-18
ES2360816T3 (es) 2011-06-09
ES2389946T3 (es) 2012-11-05
ATE504038T1 (de) 2011-04-15
IL187805A0 (en) 2008-08-07
JP5074389B2 (ja) 2012-11-14
KR101006030B1 (ko) 2011-01-06
KR20080021773A (ko) 2008-03-07
JP2008544350A (ja) 2008-12-04
WO2006135554A2 (en) 2006-12-21
EP1894091A4 (de) 2008-08-13
US20060282826A1 (en) 2006-12-14

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