DE602005021344D1 - Konfigurierung eines Multibit-Flashspeichers - Google Patents

Konfigurierung eines Multibit-Flashspeichers

Info

Publication number
DE602005021344D1
DE602005021344D1 DE602005021344T DE602005021344T DE602005021344D1 DE 602005021344 D1 DE602005021344 D1 DE 602005021344D1 DE 602005021344 T DE602005021344 T DE 602005021344T DE 602005021344 T DE602005021344 T DE 602005021344T DE 602005021344 D1 DE602005021344 D1 DE 602005021344D1
Authority
DE
Germany
Prior art keywords
configure
flash memory
bit flash
bit
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005021344T
Other languages
English (en)
Inventor
Angelo Bovino
Roberto Ravasio
Rino Micheloni
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
SK Hynix Inc
Original Assignee
STMicroelectronics SRL
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL, Hynix Semiconductor Inc filed Critical STMicroelectronics SRL
Publication of DE602005021344D1 publication Critical patent/DE602005021344D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/20—Initialising; Data preset; Chip identification

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Microcomputers (AREA)
DE602005021344T 2005-07-28 2005-07-28 Konfigurierung eines Multibit-Flashspeichers Active DE602005021344D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP05425559A EP1750277B1 (de) 2005-07-28 2005-07-28 Konfigurierung eines Multibit-Flashspeichers

Publications (1)

Publication Number Publication Date
DE602005021344D1 true DE602005021344D1 (de) 2010-07-01

Family

ID=35871010

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005021344T Active DE602005021344D1 (de) 2005-07-28 2005-07-28 Konfigurierung eines Multibit-Flashspeichers

Country Status (3)

Country Link
US (2) US7937576B2 (de)
EP (1) EP1750277B1 (de)
DE (1) DE602005021344D1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE602005021344D1 (de) * 2005-07-28 2010-07-01 St Microelectronics Srl Konfigurierung eines Multibit-Flashspeichers
EP2487794A3 (de) 2006-08-22 2013-02-13 Mosaid Technologies Incorporated Modulare Befehlsstruktur für einen Speicher und Speichersystem
US7870472B2 (en) * 2007-01-31 2011-01-11 Sandisk 3D Llc Methods and apparatus for employing redundant arrays to configure non-volatile memory
US7870471B2 (en) * 2007-01-31 2011-01-11 Sandisk 3D Llc Methods and apparatus for employing redundant arrays to configure non-volatile memory
US8122202B2 (en) * 2007-02-16 2012-02-21 Peter Gillingham Reduced pin count interface
US7957173B2 (en) * 2008-10-14 2011-06-07 Mosaid Technologies Incorporated Composite memory having a bridging device for connecting discrete memory devices to a system
US8134852B2 (en) * 2008-10-14 2012-03-13 Mosaid Technologies Incorporated Bridge device architecture for connecting discrete memory devices to a system
US20100115172A1 (en) * 2008-11-04 2010-05-06 Mosaid Technologies Incorporated Bridge device having a virtual page buffer
US8549209B2 (en) * 2008-11-04 2013-10-01 Mosaid Technologies Incorporated Bridging device having a configurable virtual page size
US8521980B2 (en) 2009-07-16 2013-08-27 Mosaid Technologies Incorporated Simultaneous read and write data transfer
US9171165B2 (en) * 2009-12-23 2015-10-27 Intel Corporation Methods, systems, and apparatuses to facilitate configuration of a hardware device in a platform
US8825967B2 (en) 2011-12-08 2014-09-02 Conversant Intellectual Property Management Inc. Independent write and read control in serially-connected devices
US8832530B2 (en) 2012-09-26 2014-09-09 Intel Corporation Techniques associated with a read and write window budget for a two level memory system
JP5745136B1 (ja) 2014-05-09 2015-07-08 力晶科技股▲ふん▼有限公司 不揮発性半導体記憶装置とその書き込み方法
IT201700062830A1 (it) * 2017-06-08 2018-12-08 Stmicroelectronics Application Gmbh Sistema di elaborazione, relativo circuito integrato, dispositivo e procedimento
US10324839B2 (en) * 2017-11-03 2019-06-18 Micron Technology, Inc. Trim setting determination on a memory device

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6023761A (en) * 1997-08-13 2000-02-08 Vlsi Technology, Inc. Method and system for using decompression on compressed software stored in non-volatile memory of an embedded computer system to yield decompressed software including initialized variables for a runtime environment
US6134704A (en) * 1998-04-03 2000-10-17 International Business Machines Corporation Integrated circuit macro apparatus
US6363008B1 (en) 2000-02-17 2002-03-26 Multi Level Memory Technology Multi-bit-cell non-volatile memory with maximized data capacity
US6396759B1 (en) * 2000-04-28 2002-05-28 Agere Systems Guardian Corp. Semiconductor device with test fuse links, and method of using the test fuse links
US6614689B2 (en) * 2001-08-13 2003-09-02 Micron Technology, Inc. Non-volatile memory having a control mini-array
US6740957B2 (en) * 2002-08-29 2004-05-25 Micron Technology, Inc. Shallow trench antifuse and methods of making and using same
US7174486B2 (en) * 2002-11-22 2007-02-06 International Business Machines Corporation Automation of fuse compression for an ASIC design system
DE60306488D1 (de) 2003-02-27 2006-08-10 St Microelectronics Srl Eingebautes Testverfahren in einem Flash Speicher
ITRM20030329A1 (it) * 2003-07-07 2005-01-08 Micron Technology Inc Cella "famos" senza precarica e circuito latch in un
US7102950B2 (en) * 2004-08-02 2006-09-05 Atmel Corporation Fuse data storage system using core memory
DE602005021344D1 (de) * 2005-07-28 2010-07-01 St Microelectronics Srl Konfigurierung eines Multibit-Flashspeichers

Also Published As

Publication number Publication date
EP1750277A1 (de) 2007-02-07
US7937576B2 (en) 2011-05-03
US20110167206A1 (en) 2011-07-07
US20070038852A1 (en) 2007-02-15
EP1750277B1 (de) 2010-05-19
US8572361B2 (en) 2013-10-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition