DE602005018067D1 - Nichtflüchtige Speicheranordnung - Google Patents

Nichtflüchtige Speicheranordnung

Info

Publication number
DE602005018067D1
DE602005018067D1 DE602005018067T DE602005018067T DE602005018067D1 DE 602005018067 D1 DE602005018067 D1 DE 602005018067D1 DE 602005018067 T DE602005018067 T DE 602005018067T DE 602005018067 T DE602005018067 T DE 602005018067T DE 602005018067 D1 DE602005018067 D1 DE 602005018067D1
Authority
DE
Germany
Prior art keywords
volatile memory
memory arrangement
arrangement
volatile
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005018067T
Other languages
English (en)
Inventor
Vijay Kumar Malhi
Antonino Mondello
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Publication of DE602005018067D1 publication Critical patent/DE602005018067D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • G11C16/105—Circuits or methods for updating contents of nonvolatile memory, especially with 'security' features to ensure reliable replacement, i.e. preventing that old data is lost before new data is reliably written
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K21/00—Details of pulse counters or frequency dividers
    • H03K21/40—Monitoring; Error detection; Preventing or correcting improper counter operation
    • H03K21/403—Arrangements for storing the counting state in case of power supply interruption

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Read Only Memory (AREA)
DE602005018067T 2005-10-13 2005-10-13 Nichtflüchtige Speicheranordnung Active DE602005018067D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP05425718A EP1775731B1 (de) 2005-10-13 2005-10-13 Nichtflüchtige Speicheranordnung

Publications (1)

Publication Number Publication Date
DE602005018067D1 true DE602005018067D1 (de) 2010-01-14

Family

ID=36013245

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005018067T Active DE602005018067D1 (de) 2005-10-13 2005-10-13 Nichtflüchtige Speicheranordnung

Country Status (3)

Country Link
US (1) US7483300B2 (de)
EP (1) EP1775731B1 (de)
DE (1) DE602005018067D1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11056192B2 (en) 2018-12-21 2021-07-06 Micron Technology, Inc. Monotonic counters in memories

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05233426A (ja) * 1992-02-20 1993-09-10 Fujitsu Ltd フラッシュ・メモリ使用方法
US5974500A (en) * 1997-11-14 1999-10-26 Atmel Corporation Memory device having programmable access protection and method of operating the same
JP2002288988A (ja) * 2001-03-28 2002-10-04 Mitsubishi Electric Corp 不揮発性半導体記憶装置
US6968460B1 (en) * 2001-05-10 2005-11-22 Advanced Micro Devices, Inc. Cryptographic randomness register for computer system security
JP4059472B2 (ja) * 2001-08-09 2008-03-12 株式会社ルネサステクノロジ メモリカード及びメモリコントローラ
US6826663B2 (en) * 2003-01-13 2004-11-30 Rambus Inc. Coded write masking
US6992937B2 (en) * 2003-07-28 2006-01-31 Silicon Storage Technology, Inc. Column redundancy for digital multilevel nonvolatile memory
ITVA20040021A1 (it) * 2004-05-04 2004-08-04 St Microelectronics Srl Amplificatore di sensing per la lettura di una cella di memoria non volatile
US7545681B2 (en) * 2006-11-27 2009-06-09 Sandisk Corporation Segmented bitscan for verification of programming

Also Published As

Publication number Publication date
US7483300B2 (en) 2009-01-27
EP1775731A1 (de) 2007-04-18
US20070130415A1 (en) 2007-06-07
EP1775731B1 (de) 2009-12-02

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