DE602004032539D1 - Laterale MOS-Anordnung und Verfahren zu deren Herstellung - Google Patents

Laterale MOS-Anordnung und Verfahren zu deren Herstellung

Info

Publication number
DE602004032539D1
DE602004032539D1 DE602004032539T DE602004032539T DE602004032539D1 DE 602004032539 D1 DE602004032539 D1 DE 602004032539D1 DE 602004032539 T DE602004032539 T DE 602004032539T DE 602004032539 T DE602004032539 T DE 602004032539T DE 602004032539 D1 DE602004032539 D1 DE 602004032539D1
Authority
DE
Germany
Prior art keywords
making same
lateral mos
mos array
array
lateral
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004032539T
Other languages
English (en)
Inventor
Antonello Santangelo
Salvatore Cascino
Leonardo Gervasi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Publication of DE602004032539D1 publication Critical patent/DE602004032539D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66659—Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1041—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
    • H01L29/1045—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107—Substrate region of field-effect devices
    • H01L29/1075—Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1087—Substrate region of field-effect devices of field-effect transistors with insulated gate characterised by the contact structure of the substrate region, e.g. for controlling or preventing bipolar effect
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/4175—Source or drain electrodes for field effect devices for lateral devices where the connection to the source or drain region is done through at least one part of the semiconductor substrate thickness, e.g. with connecting sink or with via-hole

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE602004032539T 2004-09-08 2004-09-08 Laterale MOS-Anordnung und Verfahren zu deren Herstellung Active DE602004032539D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP04425671A EP1635399B1 (de) 2004-09-08 2004-09-08 Laterale MOS-Anordnung und Verfahren zu deren Herstellung

Publications (1)

Publication Number Publication Date
DE602004032539D1 true DE602004032539D1 (de) 2011-06-16

Family

ID=34932750

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004032539T Active DE602004032539D1 (de) 2004-09-08 2004-09-08 Laterale MOS-Anordnung und Verfahren zu deren Herstellung

Country Status (3)

Country Link
US (1) US7763936B2 (de)
EP (1) EP1635399B1 (de)
DE (1) DE602004032539D1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1868247B1 (de) 2006-06-13 2013-04-24 STMicroelectronics Srl Hochfrequenz-MOS-Anordnung und Verfahren zur deren Herstellung
JP2011249728A (ja) * 2010-05-31 2011-12-08 Toshiba Corp 半導体装置および半導体装置の製造方法
US20120086054A1 (en) * 2010-10-12 2012-04-12 Tzyy-Ming Cheng Semiconductor structure and method for making the same
CN102456723A (zh) * 2010-10-26 2012-05-16 联华电子股份有限公司 半导体结构及其制造方法
ITTO20121081A1 (it) 2012-12-14 2014-06-15 St Microelectronics Srl Componente elettronico di potenza normalmente spento

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0797602B2 (ja) * 1988-05-06 1995-10-18 日本電気株式会社 半導体集積回路装置
US5119149A (en) * 1990-10-22 1992-06-02 Motorola, Inc. Gate-drain shield reduces gate to drain capacitance
US5155563A (en) * 1991-03-18 1992-10-13 Motorola, Inc. Semiconductor device having low source inductance
US5252848A (en) * 1992-02-03 1993-10-12 Motorola, Inc. Low on resistance field effect transistor
US5309025A (en) * 1992-07-27 1994-05-03 Sgs-Thomson Microelectronics, Inc. Semiconductor bond pad structure and method
JPH0730012A (ja) * 1993-07-09 1995-01-31 Fujitsu Ltd 半導体装置
US5723822A (en) * 1995-03-24 1998-03-03 Integrated Device Technology, Inc. Structure for fabricating a bonding pad having improved adhesion to an underlying structure
JPH0930649A (ja) * 1995-07-13 1997-02-04 Mitsubishi Electric Corp ピックアップ装置
JP3482779B2 (ja) * 1996-08-20 2004-01-06 セイコーエプソン株式会社 半導体装置およびその製造方法
WO1998053505A2 (en) * 1997-05-23 1998-11-26 Koninklijke Philips Electronics N.V. Lateral mos semiconductor device
US5869875A (en) 1997-06-10 1999-02-09 Spectrian Lateral diffused MOS transistor with trench source contact
US5912490A (en) * 1997-08-04 1999-06-15 Spectrian MOSFET having buried shield plate for reduced gate/drain capacitance
WO1999038204A1 (fr) * 1998-01-23 1999-07-29 Rohm Co., Ltd. Interconnexion damasquinee et dispositif a semi-conducteur
US5949104A (en) * 1998-02-07 1999-09-07 Xemod, Inc. Source connection structure for lateral RF MOS devices
US6001710A (en) * 1998-03-30 1999-12-14 Spectrian, Inc. MOSFET device having recessed gate-drain shield and method
US5918137A (en) * 1998-04-27 1999-06-29 Spectrian, Inc. MOS transistor with shield coplanar with gate electrode
US6048772A (en) * 1998-05-04 2000-04-11 Xemod, Inc. Method for fabricating a lateral RF MOS device with an non-diffusion source-backside connection
US6448650B1 (en) * 1998-05-18 2002-09-10 Texas Instruments Incorporated Fine pitch system and method for reinforcing bond pads in semiconductor devices
US6552438B2 (en) * 1998-06-24 2003-04-22 Samsung Electronics Co. Integrated circuit bonding pads including conductive layers with arrays of unaligned spaced apart insulating islands therein and methods of forming same
US6222229B1 (en) * 1999-02-18 2001-04-24 Cree, Inc. Self-aligned shield structure for realizing high frequency power MOSFET devices with improved reliability
JP4322414B2 (ja) * 2000-09-19 2009-09-02 株式会社ルネサステクノロジ 半導体装置
US6521923B1 (en) * 2002-05-25 2003-02-18 Sirenza Microdevices, Inc. Microwave field effect transistor structure on silicon carbide substrate
US6831332B2 (en) * 2002-05-25 2004-12-14 Sirenza Microdevices, Inc. Microwave field effect transistor structure
US6870219B2 (en) * 2002-07-31 2005-03-22 Motorola, Inc. Field effect transistor and method of manufacturing same
US6838731B1 (en) * 2003-04-09 2005-01-04 Sirenza Microdevices, Inc. Microwave transistor structure having step drain region
US7138690B2 (en) * 2003-07-21 2006-11-21 Agere Systems Inc. Shielding structure for use in a metal-oxide-semiconductor device
US20050280085A1 (en) * 2004-06-16 2005-12-22 Cree Microwave, Inc. LDMOS transistor having gate shield and trench source capacitor
US7148540B2 (en) * 2004-06-28 2006-12-12 Agere Systems Inc. Graded conductive structure for use in a metal-oxide-semiconductor device

Also Published As

Publication number Publication date
US20060054954A1 (en) 2006-03-16
US7763936B2 (en) 2010-07-27
EP1635399A1 (de) 2006-03-15
EP1635399B1 (de) 2011-05-04

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