DE602004030972D1 - SATA-Schalter - Google Patents

SATA-Schalter

Info

Publication number
DE602004030972D1
DE602004030972D1 DE602004030972T DE602004030972T DE602004030972D1 DE 602004030972 D1 DE602004030972 D1 DE 602004030972D1 DE 602004030972 T DE602004030972 T DE 602004030972T DE 602004030972 T DE602004030972 T DE 602004030972T DE 602004030972 D1 DE602004030972 D1 DE 602004030972D1
Authority
DE
Germany
Prior art keywords
host
switch
coupled
port coupled
units
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004030972T
Other languages
English (en)
Inventor
Siamack Nemazie
Andrew Hyonil Chong
Young-Ta Wu
Shiang-Jyh Chang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LSI Corp
Original Assignee
LSI Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LSI Corp filed Critical LSI Corp
Publication of DE602004030972D1 publication Critical patent/DE602004030972D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Pyrane Compounds (AREA)
  • Switches That Are Operated By Magnetic Or Electric Fields (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
  • Keying Circuit Devices (AREA)
  • Small-Scale Networks (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Telephone Function (AREA)
  • Transceivers (AREA)
DE602004030972T 2003-06-11 2004-05-26 SATA-Schalter Active DE602004030972D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US47785703P 2003-06-11 2003-06-11
US10/775,488 US7523235B2 (en) 2003-06-11 2004-02-09 Serial Advanced Technology Attachment (SATA) switch

Publications (1)

Publication Number Publication Date
DE602004030972D1 true DE602004030972D1 (de) 2011-02-24

Family

ID=33303338

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004030972T Active DE602004030972D1 (de) 2003-06-11 2004-05-26 SATA-Schalter

Country Status (6)

Country Link
US (2) US7523235B2 (de)
EP (1) EP1486880B1 (de)
JP (1) JP4599496B2 (de)
AT (1) ATE495496T1 (de)
DE (1) DE602004030972D1 (de)
TW (1) TWI318738B (de)

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US7865803B2 (en) 2004-04-30 2011-01-04 Mediatek Inc. Method for processing noise interference in data accessing device with serial advanced technology attachment (SATA) interface
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US7461192B2 (en) 2004-12-15 2008-12-02 Rambus Inc. Interface for bridging out-of-band information and preventing false presence detection of terminating devices
US7853741B2 (en) * 2005-04-11 2010-12-14 Emulex Design & Manufacturing Corporation Tunneling SATA targets through fibre channel
US20060277331A1 (en) * 2005-05-18 2006-12-07 Priborsky Anthony L Communication using bit replication
US8135869B2 (en) * 2005-06-30 2012-03-13 Intel Corporation Task scheduling to devices with same connection address
US7970953B2 (en) * 2005-06-30 2011-06-28 Intel Corporation Serial ATA port addressing
US7747788B2 (en) * 2005-06-30 2010-06-29 Intel Corporation Hardware oriented target-side native command queuing tag management
US7805543B2 (en) * 2005-06-30 2010-09-28 Intel Corporation Hardware oriented host-side native command queuing tag management
US7752363B2 (en) * 2005-07-04 2010-07-06 Mediatek Inc. Signal generating circuit and related method for activating physical channel between host and peripheral device
US8127059B1 (en) * 2005-09-02 2012-02-28 Pmc-Sierra Us, Inc. Apparatus for interconnecting hosts with storage devices
US7739432B1 (en) 2005-09-02 2010-06-15 Pmc-Sierra, Inc. Command switching for multiple initiator access to a SATA drive
US7676604B2 (en) * 2005-11-22 2010-03-09 Intel Corporation Task context direct indexing in a protocol engine
US7634692B2 (en) * 2006-02-10 2009-12-15 Mediatek Inc. SATA primitive prediction and correction
US7941575B2 (en) * 2006-03-03 2011-05-10 Lecroy Corporation Pause request processing for data traffic modification
US7792137B2 (en) * 2006-07-05 2010-09-07 Abidanet, Llc Self-organized and self-managed ad hoc communications network
US7761657B2 (en) 2006-07-10 2010-07-20 Hitachi, Ltd. Storage control system, control method for storage control system, port selector, and controller
US7761642B2 (en) * 2006-12-22 2010-07-20 Lsi Corporation Serial advanced technology attachment (SATA) and serial attached small computer system interface (SCSI) (SAS) bridging
JP4400650B2 (ja) * 2007-05-23 2010-01-20 セイコーエプソン株式会社 データ転送制御装置及び電子機器
US20090265199A1 (en) * 2008-04-21 2009-10-22 Computer Associates Think, Inc. System and Method for Governance, Risk, and Compliance Management
US20100250791A1 (en) * 2009-03-27 2010-09-30 Lsi Corporation Low power physical layer for SATA and SAS transceivers
US8402196B2 (en) * 2010-03-04 2013-03-19 Xyratex Technology Limited Storage assembly, a physical expander and a method
US8275925B2 (en) * 2010-08-25 2012-09-25 Lsi Corporation Methods and apparatus for improved serial advanced technology attachment performance
US8661163B2 (en) * 2011-08-22 2014-02-25 Apple Inc. Tag allocation for queued commands across multiple devices
JP6063146B2 (ja) * 2012-04-27 2017-01-18 株式会社バッファローメモリ 外部記憶装置
US9116694B2 (en) * 2012-09-26 2015-08-25 Intel Corporation Efficient low power exit sequence for peripheral devices
US20150186068A1 (en) * 2013-12-27 2015-07-02 Sandisk Technologies Inc. Command queuing using linked list queues
TWI587214B (zh) * 2016-04-21 2017-06-11 慧榮科技股份有限公司 資料儲存裝置、其控制單元及其任務排序方法
JP2019101487A (ja) * 2017-11-28 2019-06-24 ルネサスエレクトロニクス株式会社 ストレージ装置及びストレージシステム
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Also Published As

Publication number Publication date
US7523235B2 (en) 2009-04-21
EP1486880A2 (de) 2004-12-15
TW200508866A (en) 2005-03-01
JP4599496B2 (ja) 2010-12-15
JP2005327230A (ja) 2005-11-24
US20090177804A1 (en) 2009-07-09
ATE495496T1 (de) 2011-01-15
TWI318738B (en) 2009-12-21
US8266353B2 (en) 2012-09-11
EP1486880B1 (de) 2011-01-12
EP1486880A3 (de) 2006-09-20
US20040252716A1 (en) 2004-12-16

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