DE60112723D1 - Lssd schnittstelle - Google Patents
Lssd schnittstelleInfo
- Publication number
- DE60112723D1 DE60112723D1 DE60112723T DE60112723T DE60112723D1 DE 60112723 D1 DE60112723 D1 DE 60112723D1 DE 60112723 T DE60112723 T DE 60112723T DE 60112723 T DE60112723 T DE 60112723T DE 60112723 D1 DE60112723 D1 DE 60112723D1
- Authority
- DE
- Germany
- Prior art keywords
- lssd
- interface
- lssd interface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318552—Clock circuits details
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US504595 | 1990-04-03 | ||
US09/504,595 US6629277B1 (en) | 2000-02-15 | 2000-02-15 | LSSD interface |
PCT/US2001/004597 WO2001061369A1 (en) | 2000-02-15 | 2001-02-14 | Lssd interface |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60112723D1 true DE60112723D1 (de) | 2005-09-22 |
DE60112723T2 DE60112723T2 (de) | 2006-05-18 |
Family
ID=24006937
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60112723T Expired - Fee Related DE60112723T2 (de) | 2000-02-15 | 2001-02-14 | Lssd schnittstelle |
Country Status (6)
Country | Link |
---|---|
US (1) | US6629277B1 (de) |
EP (1) | EP1256009B1 (de) |
JP (1) | JP3633901B2 (de) |
AU (1) | AU2001236968A1 (de) |
DE (1) | DE60112723T2 (de) |
WO (1) | WO2001061369A1 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7047174B2 (en) * | 2001-05-02 | 2006-05-16 | Freescale Semiconductor, Inc. | Method for producing test patterns for testing an integrated circuit |
US7546568B2 (en) | 2005-12-19 | 2009-06-09 | Lsi Corporation | Automation of tie cell insertion, optimization and replacement by scan flip-flops to increase fault coverage |
JP4708269B2 (ja) * | 2006-06-22 | 2011-06-22 | シャープ株式会社 | 半導体装置、及び半導体装置の検査方法 |
US8239715B2 (en) * | 2008-06-24 | 2012-08-07 | International Business Machines Corporation | Method and apparatus for a robust embedded interface |
US7937632B2 (en) * | 2008-06-24 | 2011-05-03 | International Business Machines Corporation | Design structure and apparatus for a robust embedded interface |
US8538718B2 (en) | 2010-12-14 | 2013-09-17 | International Business Machines Corporation | Clock edge grouping for at-speed test |
CN105631077B (zh) * | 2014-11-07 | 2020-05-15 | 恩智浦美国有限公司 | 具有增大的故障覆盖率的集成电路 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3761695A (en) | 1972-10-16 | 1973-09-25 | Ibm | Method of level sensitive testing a functional logic system |
US3783254A (en) | 1972-10-16 | 1974-01-01 | Ibm | Level sensitive logic system |
US4293919A (en) | 1979-08-13 | 1981-10-06 | International Business Machines Corporation | Level sensitive scan design (LSSD) system |
US4477738A (en) | 1982-06-14 | 1984-10-16 | Ibm Corporation | LSSD Compatible clock driver |
US5172011A (en) * | 1989-06-30 | 1992-12-15 | Digital Equipment Corporation | Latch circuit and method with complementary clocking and level sensitive scan capability |
JP2553292B2 (ja) * | 1991-12-20 | 1996-11-13 | インターナショナル・ビジネス・マシーンズ・コーポレイション | 論理回路テスト装置及び方法 |
US5463338A (en) | 1993-06-07 | 1995-10-31 | Vlsi Technology, Inc. | Dual latch clocked LSSD and method |
US5497378A (en) | 1993-11-02 | 1996-03-05 | International Business Machines Corporation | System and method for testing a circuit network having elements testable by different boundary scan standards |
US5783960A (en) * | 1995-11-28 | 1998-07-21 | International Business Machines Corporation | Integrated circuit device with improved clock signal control |
US5748645A (en) * | 1996-05-29 | 1998-05-05 | Motorola, Inc. | Clock scan design from sizzle global clock and method therefor |
US5920575A (en) * | 1997-09-19 | 1999-07-06 | International Business Machines Corporation | VLSI test circuit apparatus and method |
US6040725A (en) * | 1998-06-02 | 2000-03-21 | International Business Machines Corporation | Dynamically configurable variable frequency and duty cycle clock and signal generation |
US6304122B1 (en) * | 2000-08-17 | 2001-10-16 | International Business Machines Corporation | Low power LSSD flip flops and a flushable single clock splitter for flip flops |
-
2000
- 2000-02-15 US US09/504,595 patent/US6629277B1/en not_active Expired - Lifetime
-
2001
- 2001-02-14 AU AU2001236968A patent/AU2001236968A1/en not_active Abandoned
- 2001-02-14 JP JP2001560702A patent/JP3633901B2/ja not_active Expired - Lifetime
- 2001-02-14 EP EP01909187A patent/EP1256009B1/de not_active Expired - Lifetime
- 2001-02-14 WO PCT/US2001/004597 patent/WO2001061369A1/en active IP Right Grant
- 2001-02-14 DE DE60112723T patent/DE60112723T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE60112723T2 (de) | 2006-05-18 |
EP1256009A1 (de) | 2002-11-13 |
JP2003523520A (ja) | 2003-08-05 |
AU2001236968A1 (en) | 2001-08-27 |
WO2001061369A1 (en) | 2001-08-23 |
EP1256009B1 (de) | 2005-08-17 |
US6629277B1 (en) | 2003-09-30 |
JP3633901B2 (ja) | 2005-03-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |