DE60108461D1 - Verfahren und Einrichtung zur Neutaktung eines asynchronen Takts - Google Patents

Verfahren und Einrichtung zur Neutaktung eines asynchronen Takts

Info

Publication number
DE60108461D1
DE60108461D1 DE60108461T DE60108461T DE60108461D1 DE 60108461 D1 DE60108461 D1 DE 60108461D1 DE 60108461 T DE60108461 T DE 60108461T DE 60108461 T DE60108461 T DE 60108461T DE 60108461 D1 DE60108461 D1 DE 60108461D1
Authority
DE
Germany
Prior art keywords
edge
clocking
timing signal
clock
asynchronous clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60108461T
Other languages
English (en)
Other versions
DE60108461T2 (de
Inventor
Robert B Staszewski
Kenneth J Maggio
Dirk D Leipold
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE60108461D1 publication Critical patent/DE60108461D1/de
Application granted granted Critical
Publication of DE60108461T2 publication Critical patent/DE60108461T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/50All digital phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Analogue/Digital Conversion (AREA)
DE60108461T 2000-10-23 2001-10-22 Verfahren und Einrichtung zur Neutaktung eines asynchronen Takts Expired - Lifetime DE60108461T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US242577 1994-05-13
US24257700P 2000-10-23 2000-10-23

Publications (2)

Publication Number Publication Date
DE60108461D1 true DE60108461D1 (de) 2005-02-24
DE60108461T2 DE60108461T2 (de) 2006-01-12

Family

ID=22915348

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60108461T Expired - Lifetime DE60108461T2 (de) 2000-10-23 2001-10-22 Verfahren und Einrichtung zur Neutaktung eines asynchronen Takts

Country Status (4)

Country Link
US (1) US8155256B2 (de)
EP (1) EP1202458B1 (de)
AT (1) ATE287591T1 (de)
DE (1) DE60108461T2 (de)

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US7375277B1 (en) 2000-06-26 2008-05-20 Fatigue Technology, Inc. Double flanged bushings and installation methods
US7079615B2 (en) * 2001-11-20 2006-07-18 Hewlett-Packard Development Company, L.P. Expanded comparator for control of digital delay lines in a delay locked loop or phase locked loop
ATE336393T1 (de) 2003-03-18 2006-09-15 Campagnolo Srl Speichenrad für ein fahrrad
US7448652B2 (en) 2003-07-31 2008-11-11 Fatigue Technology Inc. Tubular metal fitting expandable in a wall opening and method of installation
US20050195917A1 (en) * 2004-03-05 2005-09-08 Texas Instruments Incorporated Method and apparatus for crystal drift compensation
US7509829B2 (en) 2005-12-28 2009-03-31 Fatigue Technology, Inc. Mandrel assembly and method of using the same
BRPI0706509A2 (pt) 2006-01-11 2011-03-29 Fatigue Technology Inc kits de embuchamento, mancais e métodos de instalação
ATE536957T1 (de) 2006-04-27 2011-12-15 Fatigue Technology Inc Ausrichtungsvorrichtung und anwendungsverfahren
EP1872895B1 (de) 2006-06-29 2012-12-12 Fatigue Technology, Inc. Selbstausrichtende Werkzeuge und Dorn mit Haltebuchse
KR101468399B1 (ko) 2006-08-28 2014-12-03 퍼티구 테크놀로지 인코포레이티드 설치/처리 시스템 및 이를 사용하는 방법
US8321489B2 (en) 2006-09-15 2012-11-27 National Semiconductor Corporation Software reconfigurable digital phase lock loop architecture
WO2009052325A1 (en) 2007-10-16 2009-04-23 Fatigue Technology, Inc. Expandable fastener assembly with deformed collar
US8045669B2 (en) * 2007-11-29 2011-10-25 Qualcomm Incorporated Digital phase-locked loop operating based on fractional input and output phases
TWI357723B (en) * 2007-12-04 2012-02-01 Ind Tech Res Inst Time to digital converter apparatus
JP5606332B2 (ja) 2008-03-07 2014-10-15 ファティーグ テクノロジー インコーポレイテッド ウェーブ抑制部を有する拡張可能部材およびその使用方法
WO2010009442A2 (en) 2008-07-18 2010-01-21 Fatigue Technology, Inc. Nut plate assembly and methods of using the same
US7864915B2 (en) * 2008-10-08 2011-01-04 Qualcomm Incorporated Low-power asynchronous counter and method
US8636455B2 (en) 2009-04-10 2014-01-28 Fatigue Technoloy, Inc. Installable assembly having an expandable outer member and a fastener with a mandrel
JP2010273185A (ja) * 2009-05-22 2010-12-02 Renesas Electronics Corp デジタルフェーズロックドループ回路
US8647035B2 (en) 2009-12-16 2014-02-11 Fatigue Technology, Inc. Modular nut plate assemblies and methods of using the same
WO2012167136A2 (en) 2011-06-03 2012-12-06 Fatigue Technology, Inc. Expandable crack inhibitors and methods of using the same
EP2721311B1 (de) 2011-06-15 2018-03-14 Fatigue Technology, Inc. Modulare mutternplatten mit geschlossener mutternanordnung
US10130985B2 (en) 2012-01-30 2018-11-20 Fatigue Technology, Inc. Smart installation/processing systems, components, and methods of operating the same
CN103633998B (zh) * 2012-08-28 2017-02-15 复旦大学 一种用于全数字锁相环的低功耗鉴相器
DE102013101933A1 (de) * 2013-02-27 2014-08-28 Technische Universität Dresden Verfahren und Anordnung zur Erzeugung eines Taktsignals mittels eines Phasenregelkreises
US9201813B2 (en) 2013-09-12 2015-12-01 Socionext Inc. Signal distribution circuitry
US9748961B2 (en) * 2014-12-12 2017-08-29 Bae Systems Information And Electronic Systems Integration Inc. Single cycle asynchronous domain crossing circuit for bus data
US9541990B2 (en) 2015-04-21 2017-01-10 Cypress Semiconductor Corporation Asynchronous transceiver for on-vehicle electronic device
US9923710B2 (en) 2016-06-15 2018-03-20 Silicon Laboratories Inc. Digital oversampling clock and data recovery circuit
US10305495B2 (en) * 2016-10-06 2019-05-28 Analog Devices, Inc. Phase control of clock signal based on feedback
EP3327461B1 (de) 2016-11-23 2020-11-04 NXP USA, Inc. Digitaler synthesizer, radarvorrichtung und verfahren dafür
US11038511B2 (en) 2017-06-28 2021-06-15 Analog Devices International Unlimited Company Apparatus and methods for system clock compensation
US10623006B2 (en) 2017-06-28 2020-04-14 Analog Devices, Inc. Apparatus and methods for compensation of signal path delay variation
CN112953530B (zh) * 2021-01-28 2024-02-23 星宸科技股份有限公司 除频器电路
TWI763477B (zh) * 2021-05-10 2022-05-01 瑞昱半導體股份有限公司 全數位鎖相迴路及其校正方法
US12153088B2 (en) * 2022-05-30 2024-11-26 Taiwan Semiconductor Manufacturing Company Ltd. Electronic circuit and method of error correction

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US5212716A (en) * 1991-02-05 1993-05-18 International Business Machines Corporation Data edge phase sorting circuits
US5594735A (en) * 1992-04-10 1997-01-14 Nec Corporation TDMA mobile unit frequency synthesizer having power saving mode during transmit and receive slots
US5539784A (en) * 1994-09-30 1996-07-23 At&T Corp. Refined timing recovery circuit
KR100194624B1 (ko) * 1996-12-02 1999-06-15 이계철 데이타 리타이밍 회로
US6175603B1 (en) * 1997-08-07 2001-01-16 Cisco Technology, Inc. System for managing signals in different clock domains and a programmable digital filter
KR100261295B1 (ko) * 1997-12-03 2000-07-01 이계철 준안정이 고려된 디지털 위상 정렬장치
US6327684B1 (en) * 1999-05-11 2001-12-04 Logicvision, Inc. Method of testing at-speed circuits having asynchronous clocks and controller for use therewith
US6738442B1 (en) * 2000-01-19 2004-05-18 Agere Systems Inc. Pulse detection and synchronization system
US6326851B1 (en) 2000-06-26 2001-12-04 Texas Instruments Incorporated Digital phase-domain PLL frequency synthesizer

Also Published As

Publication number Publication date
EP1202458A1 (de) 2002-05-02
EP1202458B1 (de) 2005-01-19
US20020131538A1 (en) 2002-09-19
ATE287591T1 (de) 2005-02-15
DE60108461T2 (de) 2006-01-12
US8155256B2 (en) 2012-04-10

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