DE60100581D1 - Dynamischer Speicher mit redundanten Zellen - Google Patents

Dynamischer Speicher mit redundanten Zellen

Info

Publication number
DE60100581D1
DE60100581D1 DE60100581T DE60100581T DE60100581D1 DE 60100581 D1 DE60100581 D1 DE 60100581D1 DE 60100581 T DE60100581 T DE 60100581T DE 60100581 T DE60100581 T DE 60100581T DE 60100581 D1 DE60100581 D1 DE 60100581D1
Authority
DE
Germany
Prior art keywords
dynamic memory
redundant cells
row
activated
column
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60100581T
Other languages
English (en)
Inventor
Richard Ferrant
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Application granted granted Critical
Publication of DE60100581D1 publication Critical patent/DE60100581D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
DE60100581T 2000-06-30 2001-06-29 Dynamischer Speicher mit redundanten Zellen Expired - Lifetime DE60100581D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0008498A FR2811132B1 (fr) 2000-06-30 2000-06-30 Circuit de memoire dynamique comportant des cellules de secours

Publications (1)

Publication Number Publication Date
DE60100581D1 true DE60100581D1 (de) 2003-09-18

Family

ID=8851945

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60100581T Expired - Lifetime DE60100581D1 (de) 2000-06-30 2001-06-29 Dynamischer Speicher mit redundanten Zellen

Country Status (5)

Country Link
US (1) US6563749B2 (de)
EP (1) EP1168179B1 (de)
JP (1) JP2002042481A (de)
DE (1) DE60100581D1 (de)
FR (1) FR2811132B1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3892678B2 (ja) * 2001-03-30 2007-03-14 富士通株式会社 半導体記憶装置
US6807106B2 (en) * 2001-12-14 2004-10-19 Sandisk Corporation Hybrid density memory card
JP2008181634A (ja) 2006-12-26 2008-08-07 Semiconductor Energy Lab Co Ltd 半導体装置
US7676776B2 (en) * 2007-06-25 2010-03-09 International Business Machines Corporation Spare gate array cell distribution analysis
WO2011089835A1 (en) * 2010-01-20 2011-07-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device
TWI543177B (zh) 2010-08-19 2016-07-21 半導體能源研究所股份有限公司 半導體裝置及其檢驗方法與其驅動方法
CN114388018A (zh) * 2020-12-14 2022-04-22 台湾积体电路制造股份有限公司 存储装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6031038B2 (ja) * 1979-07-23 1985-07-19 富士通株式会社 半導体記憶装置
EP0030245B1 (de) 1979-06-15 1987-04-22 Fujitsu Limited Halbleiter-speichervorrichtung
JPH069114B2 (ja) * 1983-06-24 1994-02-02 株式会社東芝 半導体メモリ
JP2782948B2 (ja) * 1990-11-16 1998-08-06 日本電気株式会社 半導体メモリ
US5634105A (en) * 1994-07-21 1997-05-27 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device to interface control signals for a DRAM to a SRAM

Also Published As

Publication number Publication date
FR2811132B1 (fr) 2002-10-11
FR2811132A1 (fr) 2002-01-04
EP1168179A1 (de) 2002-01-02
JP2002042481A (ja) 2002-02-08
EP1168179B1 (de) 2003-08-13
US20020001242A1 (en) 2002-01-03
US6563749B2 (en) 2003-05-13

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Legal Events

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8332 No legal effect for de