TW200703624A - Method of fabricating dynamic random access memory and array of the same - Google Patents

Method of fabricating dynamic random access memory and array of the same

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Publication number
TW200703624A
TW200703624A TW094122285A TW94122285A TW200703624A TW 200703624 A TW200703624 A TW 200703624A TW 094122285 A TW094122285 A TW 094122285A TW 94122285 A TW94122285 A TW 94122285A TW 200703624 A TW200703624 A TW 200703624A
Authority
TW
Taiwan
Prior art keywords
lines
transistor
array
random access
dynamic random
Prior art date
Application number
TW094122285A
Other languages
Chinese (zh)
Other versions
TWI278100B (en
Inventor
Meng-Hung Chen
Original Assignee
Nanya Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nanya Technology Corp filed Critical Nanya Technology Corp
Priority to TW94122285A priority Critical patent/TWI278100B/en
Publication of TW200703624A publication Critical patent/TW200703624A/en
Application granted granted Critical
Publication of TWI278100B publication Critical patent/TWI278100B/en

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  • Dram (AREA)

Abstract

An array of dynamic random access memory is described. The array of dynamic random access memory includes a silicon-on-insulator substrate, a plurality of memory units, a plurality of body lines, a plurality of word lines, and a plurality of bit lines. The memory cells are disposed on the silicon-on-insulator substrate and arranged in row and column lines. Each memory unit includes a transistor and a capacitor. The body lines are parallel in row lines. Each body line is stringed two transistors in the same row line and connected electrically to a body region of the transistor. The word lines are parallel with the body lines. Each word line is connected to two gate structure of the transistor in the same row line. The bit lines are perpendicular with the word lines. Each bit line is stringed the transistor in the same column and connected electrically to a source/drain region of the transistor.
TW94122285A 2005-07-01 2005-07-01 Method of fabricating dynamic random access memory and array of the same TWI278100B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW94122285A TWI278100B (en) 2005-07-01 2005-07-01 Method of fabricating dynamic random access memory and array of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW94122285A TWI278100B (en) 2005-07-01 2005-07-01 Method of fabricating dynamic random access memory and array of the same

Publications (2)

Publication Number Publication Date
TW200703624A true TW200703624A (en) 2007-01-16
TWI278100B TWI278100B (en) 2007-04-01

Family

ID=38626110

Family Applications (1)

Application Number Title Priority Date Filing Date
TW94122285A TWI278100B (en) 2005-07-01 2005-07-01 Method of fabricating dynamic random access memory and array of the same

Country Status (1)

Country Link
TW (1) TWI278100B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI611561B (en) * 2012-11-16 2018-01-11 愛思開海力士有限公司 Semiconductor device and method of manufacturing the same
TWI807553B (en) * 2021-01-07 2023-07-01 新加坡商新加坡優尼山帝斯電子私人有限公司 A manufacturing method of memory device including semiconductor element

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10622030B1 (en) 2018-10-28 2020-04-14 Nanya Technology Corporation Memory structure with non-straight word line
TWI796578B (en) 2020-07-03 2023-03-21 華邦電子股份有限公司 Semiconductor structure and method for manufacturing the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI611561B (en) * 2012-11-16 2018-01-11 愛思開海力士有限公司 Semiconductor device and method of manufacturing the same
US9941291B2 (en) 2012-11-16 2018-04-10 SK Hynix Inc. Three-dimensional non-volatile memory device
TWI807553B (en) * 2021-01-07 2023-07-01 新加坡商新加坡優尼山帝斯電子私人有限公司 A manufacturing method of memory device including semiconductor element

Also Published As

Publication number Publication date
TWI278100B (en) 2007-04-01

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