DE60038307D1 - Assoziativspeicher zur cachespeicherung - Google Patents

Assoziativspeicher zur cachespeicherung

Info

Publication number
DE60038307D1
DE60038307D1 DE60038307T DE60038307T DE60038307D1 DE 60038307 D1 DE60038307 D1 DE 60038307D1 DE 60038307 T DE60038307 T DE 60038307T DE 60038307 T DE60038307 T DE 60038307T DE 60038307 D1 DE60038307 D1 DE 60038307D1
Authority
DE
Germany
Prior art keywords
data
associative memory
search
associative
caching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60038307T
Other languages
English (en)
Other versions
DE60038307T2 (de
Inventor
Alex E Henderson
Walter E Croft
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of DE60038307D1 publication Critical patent/DE60038307D1/de
Publication of DE60038307T2 publication Critical patent/DE60038307T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893Caches characterised by their organisation or structure
    • G06F12/0897Caches characterised by their organisation or structure with two or more cache hierarchy levels
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Debugging And Monitoring (AREA)
DE60038307T 1999-08-11 2000-08-11 Assoziativspeicher zur cachespeicherung Expired - Lifetime DE60038307T2 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US636305 1990-12-31
US14840699P 1999-08-11 1999-08-11
US148406P 1999-08-11
US09/636,305 US6378042B1 (en) 1999-08-11 2000-08-10 Caching associative memory
PCT/US2000/022242 WO2001011469A1 (en) 1999-08-11 2000-08-11 Caching associative memory

Publications (2)

Publication Number Publication Date
DE60038307D1 true DE60038307D1 (de) 2008-04-24
DE60038307T2 DE60038307T2 (de) 2009-03-19

Family

ID=26845830

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60038307T Expired - Lifetime DE60038307T2 (de) 1999-08-11 2000-08-11 Assoziativspeicher zur cachespeicherung

Country Status (6)

Country Link
US (1) US6378042B1 (de)
EP (1) EP1212684B1 (de)
AT (1) ATE389208T1 (de)
AU (1) AU6770700A (de)
DE (1) DE60038307T2 (de)
WO (1) WO2001011469A1 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1667027A1 (de) 1999-09-07 2006-06-07 Intel Corporation Zwischenspeicherung (Caching) in dynamischem Speicher
JP4097883B2 (ja) * 2000-07-04 2008-06-11 松下電器産業株式会社 データ転送装置および方法
US20020049922A1 (en) * 2000-10-25 2002-04-25 Neocore Inc. Search engine system and method
US6775745B1 (en) * 2001-09-07 2004-08-10 Roxio, Inc. Method and apparatus for hybrid data caching mechanism
US6820170B1 (en) 2002-06-24 2004-11-16 Applied Micro Circuits Corporation Context based cache indexing
US7013367B2 (en) * 2002-07-18 2006-03-14 Intel Corporation Caching associative memory using non-overlapping data
JP2005190429A (ja) * 2003-12-26 2005-07-14 Hiroshima Univ 参照データ認識・学習方法及びパターン認識システム
US7392349B1 (en) * 2004-01-27 2008-06-24 Netlogic Microsystems, Inc. Table management within a policy-based routing system
US20060242368A1 (en) * 2005-04-26 2006-10-26 Cheng-Yen Huang Method of Queuing and Related Apparatus
US7502890B2 (en) * 2006-07-07 2009-03-10 International Business Machines Corporation Method and apparatus for dynamic priority-based cache replacement
US9052826B2 (en) * 2006-07-28 2015-06-09 Condusiv Technologies Corporation Selecting storage locations for storing data based on storage location attributes and data usage statistics
US7870128B2 (en) * 2006-07-28 2011-01-11 Diskeeper Corporation Assigning data for storage based on speed with which data may be retrieved
US20090132621A1 (en) * 2006-07-28 2009-05-21 Craig Jensen Selecting storage location for file storage based on storage longevity and speed
US8812533B1 (en) * 2009-05-21 2014-08-19 Salesforce.Com, Inc. System, method and computer program product for automatically presenting selectable options in a lookup field
US8438330B2 (en) 2010-05-17 2013-05-07 Netlogic Microsystems, Inc. Updating cam arrays using prefix length distribution prediction
US20120124291A1 (en) * 2010-11-16 2012-05-17 International Business Machines Corporation Secondary Cache Memory With A Counter For Determining Whether to Replace Cached Data
US9286237B2 (en) * 2013-03-11 2016-03-15 Intel Corporation Memory imbalance prediction based cache management
US20150039823A1 (en) * 2013-07-30 2015-02-05 Mediatek Inc. Table lookup apparatus using content-addressable memory based device and related table lookup method thereof

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3911401A (en) 1973-06-04 1975-10-07 Ibm Hierarchial memory/storage system for an electronic computer
US4980823A (en) * 1987-06-22 1990-12-25 International Business Machines Corporation Sequential prefetching with deconfirmation
DE69224084T2 (de) * 1991-01-15 1998-07-23 Koninkl Philips Electronics Nv Rechneranordnung mit Mehrfachpufferdatencachespeicher und Verfahren dafür
US5265232A (en) * 1991-04-03 1993-11-23 International Business Machines Corporation Coherence control by data invalidation in selected processor caches without broadcasting to processor caches not having the data
US5761706A (en) * 1994-11-01 1998-06-02 Cray Research, Inc. Stream buffers for high-performance computer memory system
US5701426A (en) * 1995-03-31 1997-12-23 Bull Information Systems Inc. Data processing system and method using cache miss address prediction and forced LRU status in a cache memory to improve cache hit ratio
US5996071A (en) * 1995-12-15 1999-11-30 Via-Cyrix, Inc. Detecting self-modifying code in a pipelined processor with branch processing by comparing latched store address to subsequent target address
US6195735B1 (en) * 1996-12-31 2001-02-27 Texas Instruments Incorporated Prefetch circuity for prefetching variable size data
US6065091A (en) * 1997-05-30 2000-05-16 Via-Cyrix, Inc. Translation look-aside buffer slice circuit and method of operation
US5970509A (en) * 1997-05-30 1999-10-19 National Semiconductor Corporation Hit determination circuit for selecting a data set based on miss determinations in other data sets and method of operation
US6226710B1 (en) 1997-11-14 2001-05-01 Utmc Microelectronic Systems Inc. Content addressable memory (CAM) engine
US6161144A (en) * 1998-01-23 2000-12-12 Alcatel Internetworking (Pe), Inc. Network switching device with concurrent key lookups
GB2348024B (en) * 1999-03-16 2003-06-25 Ibm Cache memory systems

Also Published As

Publication number Publication date
EP1212684B1 (de) 2008-03-12
WO2001011469A1 (en) 2001-02-15
EP1212684A1 (de) 2002-06-12
ATE389208T1 (de) 2008-03-15
AU6770700A (en) 2001-03-05
DE60038307T2 (de) 2009-03-19
US6378042B1 (en) 2002-04-23

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