ATE542179T1 - Mehrstufiges cachespeichersystem - Google Patents

Mehrstufiges cachespeichersystem

Info

Publication number
ATE542179T1
ATE542179T1 AT01959896T AT01959896T ATE542179T1 AT E542179 T1 ATE542179 T1 AT E542179T1 AT 01959896 T AT01959896 T AT 01959896T AT 01959896 T AT01959896 T AT 01959896T AT E542179 T1 ATE542179 T1 AT E542179T1
Authority
AT
Austria
Prior art keywords
data
cache
requests
data items
allocated
Prior art date
Application number
AT01959896T
Other languages
English (en)
Inventor
Lawrence Jacobs
Alan Demers
Norman Woo
Original Assignee
Oracle Int Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oracle Int Corp filed Critical Oracle Int Corp
Application granted granted Critical
Publication of ATE542179T1 publication Critical patent/ATE542179T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G06F12/0897—Caches characterised by their organisation or structure with two or more cache hierarchy levels

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Information Transfer Between Computers (AREA)
  • Storage Device Security (AREA)
  • Defrosting Systems (AREA)
  • Electrophonic Musical Instruments (AREA)
  • Radar Systems Or Details Thereof (AREA)
AT01959896T 2000-08-29 2001-08-13 Mehrstufiges cachespeichersystem ATE542179T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/650,498 US6732237B1 (en) 2000-08-29 2000-08-29 Multi-tier caching system
PCT/US2001/041711 WO2002019114A2 (en) 2000-08-29 2001-08-13 Multi-tier caching system

Publications (1)

Publication Number Publication Date
ATE542179T1 true ATE542179T1 (de) 2012-02-15

Family

ID=24609173

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01959896T ATE542179T1 (de) 2000-08-29 2001-08-13 Mehrstufiges cachespeichersystem

Country Status (7)

Country Link
US (1) US6732237B1 (de)
EP (1) EP1362289B1 (de)
JP (2) JP2004516532A (de)
AT (1) ATE542179T1 (de)
AU (2) AU2001281409B2 (de)
CA (1) CA2414785C (de)
WO (1) WO2002019114A2 (de)

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* Cited by examiner, † Cited by third party
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