DE60020794D1 - Verschlüsselungsschaltungsarchitektur zur gleichzeitigen Ausführung mehrerer Verschlüsselungsalgorithmen ohne Leistungseinbusse - Google Patents

Verschlüsselungsschaltungsarchitektur zur gleichzeitigen Ausführung mehrerer Verschlüsselungsalgorithmen ohne Leistungseinbusse

Info

Publication number
DE60020794D1
DE60020794D1 DE60020794T DE60020794T DE60020794D1 DE 60020794 D1 DE60020794 D1 DE 60020794D1 DE 60020794 T DE60020794 T DE 60020794T DE 60020794 T DE60020794 T DE 60020794T DE 60020794 D1 DE60020794 D1 DE 60020794D1
Authority
DE
Germany
Prior art keywords
encryption
circuit architecture
concurrent execution
performance penalty
module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60020794T
Other languages
English (en)
Other versions
DE60020794T2 (de
Inventor
Quere Patrick Le
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SA
Original Assignee
Bull SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SA filed Critical Bull SA
Application granted granted Critical
Publication of DE60020794D1 publication Critical patent/DE60020794D1/de
Publication of DE60020794T2 publication Critical patent/DE60020794T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/72Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in cryptographic circuits
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/14Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols using a plurality of keys or algorithms

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Storage Device Security (AREA)
  • Information Transfer Systems (AREA)
DE60020794T 1999-11-09 2000-11-06 Verschlüsselungsschaltungsarchitektur zur gleichzeitigen Ausführung mehrerer Verschlüsselungsalgorithmen ohne Leistungseinbusse Expired - Lifetime DE60020794T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9914067A FR2800952B1 (fr) 1999-11-09 1999-11-09 Architecture d'un circuit de chiffrement mettant en oeuvre differents types d'algorithmes de chiffrement simultanement sans perte de performance
FR9914067 1999-11-09

Publications (2)

Publication Number Publication Date
DE60020794D1 true DE60020794D1 (de) 2005-07-21
DE60020794T2 DE60020794T2 (de) 2006-05-04

Family

ID=9551907

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60020794T Expired - Lifetime DE60020794T2 (de) 1999-11-09 2000-11-06 Verschlüsselungsschaltungsarchitektur zur gleichzeitigen Ausführung mehrerer Verschlüsselungsalgorithmen ohne Leistungseinbusse

Country Status (5)

Country Link
US (2) US7418598B1 (de)
EP (1) EP1100225B1 (de)
JP (1) JP4138225B2 (de)
DE (1) DE60020794T2 (de)
FR (1) FR2800952B1 (de)

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KR20040042730A (ko) * 2002-11-15 2004-05-20 엘지엔시스(주) 네트워크 암호화 장치 및 방법
US7937595B1 (en) * 2003-06-27 2011-05-03 Zoran Corporation Integrated encryption/decryption functionality in a digital TV/PVR system-on-chip
US7636857B2 (en) * 2004-05-24 2009-12-22 Interdigital Technology Corporation Data-mover controller with plural registers for supporting ciphering operations
US20060117122A1 (en) * 2004-11-04 2006-06-01 Intel Corporation Method and apparatus for conditionally obfuscating bus communications
US20070016799A1 (en) * 2005-07-14 2007-01-18 Nokia Corporation DRAM to mass memory interface with security processor
US7995753B2 (en) * 2005-08-29 2011-08-09 Cisco Technology, Inc. Parallel cipher operations using a single data pass
JP5201716B2 (ja) * 2007-09-28 2013-06-05 東芝ソリューション株式会社 暗号モジュール配信システム、暗号管理サーバ装置、暗号処理装置、クライアント装置、暗号管理プログラム、暗号処理プログラム、およびクライアントプログラム
US8300825B2 (en) * 2008-06-30 2012-10-30 Intel Corporation Data encryption and/or decryption by integrated circuit
EP2544116A1 (de) * 2011-07-06 2013-01-09 Gemalto SA Verfahren zur Verwaltung des Ladens von Daten in einer sicheren Vorrichtung
JPWO2014049830A1 (ja) * 2012-09-28 2016-08-22 富士通株式会社 情報処理装置および半導体装置
FR3003712B1 (fr) * 2013-03-19 2016-08-05 Altis Semiconductor Snc Module de securite materiel
KR102218715B1 (ko) * 2014-06-19 2021-02-23 삼성전자주식회사 채널별로 데이터를 보호할 수 있는 반도체 장치
CN105790927B (zh) * 2016-02-26 2019-02-01 华为技术有限公司 一种总线分级加密系统
DE102017213010A1 (de) * 2017-07-28 2019-01-31 Audi Ag Gesamtvorrichtung mit einer Authentifizierungsanordnung und Verfahren zur Authentifizierung
CN116049910A (zh) * 2023-02-01 2023-05-02 广东高云半导体科技股份有限公司 一种数据加密系统及方法

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Also Published As

Publication number Publication date
US20070223688A1 (en) 2007-09-27
JP4138225B2 (ja) 2008-08-27
EP1100225A1 (de) 2001-05-16
US7418598B1 (en) 2008-08-26
JP2001211163A (ja) 2001-08-03
DE60020794T2 (de) 2006-05-04
FR2800952B1 (fr) 2001-12-07
EP1100225B1 (de) 2005-06-15
FR2800952A1 (fr) 2001-05-11

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