DE60005860T2 - Ablaufsteuerung zum ausgeben und wiederausgeben von ketten abhängiger befehle - Google Patents
Ablaufsteuerung zum ausgeben und wiederausgeben von ketten abhängiger befehle Download PDFInfo
- Publication number
- DE60005860T2 DE60005860T2 DE60005860T DE60005860T DE60005860T2 DE 60005860 T2 DE60005860 T2 DE 60005860T2 DE 60005860 T DE60005860 T DE 60005860T DE 60005860 T DE60005860 T DE 60005860T DE 60005860 T2 DE60005860 T2 DE 60005860T2
- Authority
- DE
- Germany
- Prior art keywords
- store
- command
- instruction
- buffer
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3842—Speculative instruction execution
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
- G06F9/384—Register renaming
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3858—Result writeback, i.e. updating the architectural state or memory
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3858—Result writeback, i.e. updating the architectural state or memory
- G06F9/38585—Result writeback, i.e. updating the architectural state or memory with result invalidation, e.g. nullification
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
Applications Claiming Priority (9)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US47657000A | 2000-01-03 | 2000-01-03 | |
| US476578 | 2000-01-03 | ||
| US09/476,322 US6564315B1 (en) | 2000-01-03 | 2000-01-03 | Scheduler which discovers non-speculative nature of an instruction after issuing and reissues the instruction |
| US09/476,578 US6542984B1 (en) | 2000-01-03 | 2000-01-03 | Scheduler capable of issuing and reissuing dependency chains |
| US476570 | 2000-01-03 | ||
| US476322 | 2000-01-03 | ||
| US476204 | 2000-01-03 | ||
| US09/476,204 US6622235B1 (en) | 2000-01-03 | 2000-01-03 | Scheduler which retries load/store hit situations |
| PCT/US2000/022458 WO2001050253A1 (en) | 2000-01-03 | 2000-08-16 | Scheduler capable of issuing and reissuing dependency chains |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE60005860D1 DE60005860D1 (de) | 2003-11-13 |
| DE60005860T2 true DE60005860T2 (de) | 2004-08-05 |
Family
ID=27504212
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE60005860T Expired - Lifetime DE60005860T2 (de) | 2000-01-03 | 2000-08-16 | Ablaufsteuerung zum ausgeben und wiederausgeben von ketten abhängiger befehle |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP1244962B1 (enExample) |
| JP (1) | JP2003519833A (enExample) |
| KR (1) | KR100747128B1 (enExample) |
| CN (1) | CN1210649C (enExample) |
| DE (1) | DE60005860T2 (enExample) |
| WO (1) | WO2001050253A1 (enExample) |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20020138714A1 (en) * | 2001-03-22 | 2002-09-26 | Sun Microsystems, Inc. | Scoreboard for scheduling of instructions in a microprocessor that provides out of order execution |
| US7165167B2 (en) * | 2003-06-10 | 2007-01-16 | Advanced Micro Devices, Inc. | Load store unit with replay mechanism |
| US7243200B2 (en) * | 2004-07-15 | 2007-07-10 | International Business Machines Corporation | Establishing command order in an out of order DMA command queue |
| US8327115B2 (en) | 2006-04-12 | 2012-12-04 | Soft Machines, Inc. | Plural matrices of execution units for processing matrices of row dependent instructions in single clock cycle in super or separate mode |
| EP2527972A3 (en) | 2006-11-14 | 2014-08-06 | Soft Machines, Inc. | Apparatus and method for processing complex instruction formats in a multi- threaded architecture supporting various context switch modes and virtualization schemes |
| EP3156896B1 (en) | 2010-09-17 | 2020-04-08 | Soft Machines, Inc. | Single cycle multi-branch prediction including shadow cache for early far branch prediction |
| EP2689326B1 (en) | 2011-03-25 | 2022-11-16 | Intel Corporation | Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines |
| US9842005B2 (en) | 2011-03-25 | 2017-12-12 | Intel Corporation | Register file segments for supporting code block execution by using virtual cores instantiated by partitionable engines |
| WO2012135031A2 (en) | 2011-03-25 | 2012-10-04 | Soft Machines, Inc. | Executing instruction sequence code blocks by using virtual cores instantiated by partitionable engines |
| KR101639853B1 (ko) | 2011-05-20 | 2016-07-14 | 소프트 머신즈, 인크. | 복수의 엔진에 의해 명령어 시퀀스들의 실행을 지원하기 위한 자원들 및 상호접속 구조들의 비집중 할당 |
| CN103649931B (zh) | 2011-05-20 | 2016-10-12 | 索夫特机械公司 | 用于支持由多个引擎执行指令序列的互连结构 |
| EP2783281B1 (en) | 2011-11-22 | 2020-05-13 | Intel Corporation | A microprocessor accelerated code optimizer |
| KR101703401B1 (ko) | 2011-11-22 | 2017-02-06 | 소프트 머신즈, 인크. | 다중 엔진 마이크로프로세서용 가속 코드 최적화기 |
| US9400653B2 (en) * | 2013-03-14 | 2016-07-26 | Samsung Electronics Co., Ltd. | System and method to clear and rebuild dependencies |
| US9811342B2 (en) | 2013-03-15 | 2017-11-07 | Intel Corporation | Method for performing dual dispatch of blocks and half blocks |
| US9886279B2 (en) | 2013-03-15 | 2018-02-06 | Intel Corporation | Method for populating and instruction view data structure by using register template snapshots |
| US10140138B2 (en) | 2013-03-15 | 2018-11-27 | Intel Corporation | Methods, systems and apparatus for supporting wide and efficient front-end operation with guest-architecture emulation |
| WO2014150991A1 (en) | 2013-03-15 | 2014-09-25 | Soft Machines, Inc. | A method for implementing a reduced size register view data structure in a microprocessor |
| US9569216B2 (en) | 2013-03-15 | 2017-02-14 | Soft Machines, Inc. | Method for populating a source view data structure by using register template snapshots |
| US10275255B2 (en) | 2013-03-15 | 2019-04-30 | Intel Corporation | Method for dependency broadcasting through a source organized source view data structure |
| CN105210040B (zh) | 2013-03-15 | 2019-04-02 | 英特尔公司 | 用于执行分组成块的多线程指令的方法 |
| CN105247484B (zh) | 2013-03-15 | 2021-02-23 | 英特尔公司 | 利用本地分布式标志体系架构来仿真访客集中式标志体系架构的方法 |
| US9904625B2 (en) | 2013-03-15 | 2018-02-27 | Intel Corporation | Methods, systems and apparatus for predicting the way of a set associative cache |
| WO2014150971A1 (en) | 2013-03-15 | 2014-09-25 | Soft Machines, Inc. | A method for dependency broadcasting through a block organized source view data structure |
| US9891924B2 (en) | 2013-03-15 | 2018-02-13 | Intel Corporation | Method for implementing a reduced size register view data structure in a microprocessor |
| CN105190541A (zh) * | 2013-03-15 | 2015-12-23 | 索夫特机械公司 | 利用具有寄存器视图、源视图、指令视图以及多个注册模板的微处理器体系架构执行指令块的方法 |
| WO2014150806A1 (en) | 2013-03-15 | 2014-09-25 | Soft Machines, Inc. | A method for populating register view data structure by using register template snapshots |
| JP7428689B2 (ja) | 2021-12-17 | 2024-02-06 | 華邦電子股▲ふん▼有限公司 | メモリシステム |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5546554A (en) * | 1994-02-02 | 1996-08-13 | Sun Microsystems, Inc. | Apparatus for dynamic register management in a floating point unit |
| US5673426A (en) * | 1995-02-14 | 1997-09-30 | Hal Computer Systems, Inc. | Processor structure and method for tracking floating-point exceptions |
| US5710902A (en) * | 1995-09-06 | 1998-01-20 | Intel Corporation | Instruction dependency chain indentifier |
| DE69814415T2 (de) * | 1997-01-29 | 2004-03-11 | Advanced Micro Devices, Inc., Sunnyvale | Zeilenorientierter wiedereinordnungsspeicher für superskalaren mikroprozessor |
| US5987594A (en) * | 1997-06-25 | 1999-11-16 | Sun Microsystems, Inc. | Apparatus for executing coded dependent instructions having variable latencies |
| US6098166A (en) * | 1998-04-10 | 2000-08-01 | Compaq Computer Corporation | Speculative issue of instructions under a load miss shadow |
| KR100611341B1 (ko) * | 1998-08-24 | 2006-08-14 | 어드밴스드 마이크로 디바이시즈, 인코포레이티드 | 저장 어드레스 생성에 대한 적재 블록을 위한 메커니즘 |
-
2000
- 2000-08-16 WO PCT/US2000/022458 patent/WO2001050253A1/en not_active Ceased
- 2000-08-16 JP JP2001550546A patent/JP2003519833A/ja active Pending
- 2000-08-16 CN CNB00818156XA patent/CN1210649C/zh not_active Expired - Lifetime
- 2000-08-16 EP EP00964913A patent/EP1244962B1/en not_active Expired - Lifetime
- 2000-08-16 DE DE60005860T patent/DE60005860T2/de not_active Expired - Lifetime
- 2000-08-16 KR KR1020027008673A patent/KR100747128B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR20020097149A (ko) | 2002-12-31 |
| KR100747128B1 (ko) | 2007-08-09 |
| WO2001050253A1 (en) | 2001-07-12 |
| EP1244962B1 (en) | 2003-10-08 |
| CN1451115A (zh) | 2003-10-22 |
| CN1210649C (zh) | 2005-07-13 |
| EP1244962A1 (en) | 2002-10-02 |
| JP2003519833A (ja) | 2003-06-24 |
| DE60005860D1 (de) | 2003-11-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8364 | No opposition during term of opposition | ||
| 8327 | Change in the person/name/address of the patent owner |
Owner name: GLOBALFOUNDRIES INC. MAPLES CORPORATE SERVICES, KY |