DE60000750T2 - Phasenregelkreis - Google Patents

Phasenregelkreis

Info

Publication number
DE60000750T2
DE60000750T2 DE60000750T DE60000750T DE60000750T2 DE 60000750 T2 DE60000750 T2 DE 60000750T2 DE 60000750 T DE60000750 T DE 60000750T DE 60000750 T DE60000750 T DE 60000750T DE 60000750 T2 DE60000750 T2 DE 60000750T2
Authority
DE
Germany
Prior art keywords
phase
locked loop
locked
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60000750T
Other languages
English (en)
Other versions
DE60000750D1 (de
Inventor
Andy Turudic
David E Mcneill
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qorvo US Inc
Original Assignee
Triquint Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Triquint Semiconductor Inc filed Critical Triquint Semiconductor Inc
Publication of DE60000750D1 publication Critical patent/DE60000750D1/de
Application granted granted Critical
Publication of DE60000750T2 publication Critical patent/DE60000750T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/64—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two
    • H03K23/66—Pulse counters comprising counting chains; Frequency dividers comprising counting chains with a base or radix other than a power of two with a variable counting base, e.g. by presetting or by adding or suppressing pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
DE60000750T 1999-02-17 2000-02-07 Phasenregelkreis Expired - Fee Related DE60000750T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/251,703 US6359948B1 (en) 1999-02-17 1999-02-17 Phase-locked loop circuit with reduced jitter

Publications (2)

Publication Number Publication Date
DE60000750D1 DE60000750D1 (de) 2002-12-19
DE60000750T2 true DE60000750T2 (de) 2003-07-17

Family

ID=22953058

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60000750T Expired - Fee Related DE60000750T2 (de) 1999-02-17 2000-02-07 Phasenregelkreis

Country Status (4)

Country Link
US (1) US6359948B1 (de)
EP (1) EP1030451B1 (de)
JP (1) JP2000244315A (de)
DE (1) DE60000750T2 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007034186A1 (de) * 2007-07-23 2009-01-29 Texas Instruments Deutschland Gmbh Digital gesteuerter Oszillator

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002280842A (ja) * 2001-03-21 2002-09-27 Hitachi Ltd 電力増幅器モジュール
JP3660638B2 (ja) * 2002-03-27 2005-06-15 株式会社東芝 クロック抽出回路
US8250394B2 (en) * 2006-03-31 2012-08-21 Stmicroelectronics International N.V. Varying the number of generated clock signals and selecting a clock signal in response to a change in memory fill level
US8077822B2 (en) * 2008-04-29 2011-12-13 Qualcomm Incorporated System and method of controlling power consumption in a digital phase locked loop (DPLL)
US9986159B2 (en) * 2013-04-05 2018-05-29 Nvidia Corporation Technique for reducing the power consumption for a video encoder engine

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4087677A (en) 1976-09-29 1978-05-02 International Telephone & Telegraph Corporation Digital PSK modem
US4590602A (en) 1983-08-18 1986-05-20 General Signal Wide range clock recovery circuit
JPH01254021A (ja) 1988-04-04 1989-10-11 Mitsubishi Electric Corp 分周装置
JP3016354B2 (ja) 1996-01-31 2000-03-06 日本電気株式会社 マルチプレクサ回路
EP0841754A3 (de) 1996-11-08 1998-12-16 Texas Instruments Incorporated Digital gesteuerter Oszillator

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007034186A1 (de) * 2007-07-23 2009-01-29 Texas Instruments Deutschland Gmbh Digital gesteuerter Oszillator
DE102007034186B4 (de) * 2007-07-23 2010-04-08 Texas Instruments Deutschland Gmbh Digital gesteuerter Oszillator
US7800454B2 (en) 2007-07-23 2010-09-21 Texas Instruments Incorporated Digital controlled oscillator

Also Published As

Publication number Publication date
EP1030451B1 (de) 2002-11-13
DE60000750D1 (de) 2002-12-19
US6359948B1 (en) 2002-03-19
JP2000244315A (ja) 2000-09-08
EP1030451A1 (de) 2000-08-23

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee
8364 No opposition during term of opposition