DE3888294D1 - Eingangsschaltung, die in eine Halbleiteranlage eingegliedert ist. - Google Patents

Eingangsschaltung, die in eine Halbleiteranlage eingegliedert ist.

Info

Publication number
DE3888294D1
DE3888294D1 DE88119361T DE3888294T DE3888294D1 DE 3888294 D1 DE3888294 D1 DE 3888294D1 DE 88119361 T DE88119361 T DE 88119361T DE 3888294 T DE3888294 T DE 3888294T DE 3888294 D1 DE3888294 D1 DE 3888294D1
Authority
DE
Germany
Prior art keywords
integrated
input circuit
semiconductor system
semiconductor
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE88119361T
Other languages
English (en)
Other versions
DE3888294T2 (de
Inventor
Hiroyuki Kobatake
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3888294D1 publication Critical patent/DE3888294D1/de
Publication of DE3888294T2 publication Critical patent/DE3888294T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/066—Means for reducing external access-lines for a semiconductor memory clip, e.g. by multiplexing at least address and data signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
DE3888294T 1987-11-25 1988-11-21 Eingangsschaltung, die in eine Halbleiteranlage eingegliedert ist. Expired - Fee Related DE3888294T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29825587 1987-11-25

Publications (2)

Publication Number Publication Date
DE3888294D1 true DE3888294D1 (de) 1994-04-14
DE3888294T2 DE3888294T2 (de) 1994-06-23

Family

ID=17857251

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3888294T Expired - Fee Related DE3888294T2 (de) 1987-11-25 1988-11-21 Eingangsschaltung, die in eine Halbleiteranlage eingegliedert ist.

Country Status (4)

Country Link
US (1) US4910710A (de)
EP (1) EP0317939B1 (de)
KR (1) KR930000958B1 (de)
DE (1) DE3888294T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2698834B2 (ja) * 1988-11-22 1998-01-19 株式会社日立製作所 不揮発性記憶装置
JP2569777B2 (ja) * 1988-12-16 1997-01-08 日本電気株式会社 入力信号切り換え回路
US5202852A (en) * 1989-02-09 1993-04-13 Mitsubishi Denki Kabushiki Kaisha Programmable read only memory card with improved buffer circuit
JP2650124B2 (ja) * 1989-07-11 1997-09-03 三菱電機株式会社 半導体集積回路
JP2900523B2 (ja) * 1990-05-31 1999-06-02 日本電気株式会社 不揮発性半導体メモリ装置の書込回路
JP2595781B2 (ja) * 1990-07-13 1997-04-02 日本電気株式会社 半導体記憶装置
JP2655441B2 (ja) * 1990-07-13 1997-09-17 日本電気株式会社 読み出し専用半導体記憶装置
JPH04141759A (ja) * 1990-10-03 1992-05-15 Mitsubishi Electric Corp ３ステート双方向バッファ及びこれを用いた携帯型半導体記憶装置
KR0172238B1 (ko) * 1995-06-30 1999-03-30 김주용 멀티-비트 데이타 출력 완충장치
DE19808525A1 (de) * 1998-02-27 1999-09-02 Siemens Ag Integrierte Schaltung

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55115729A (en) * 1979-02-28 1980-09-05 Toshiba Corp Mos transistor circuit
JPS5952497A (ja) * 1982-09-17 1984-03-27 Nec Corp デコ−ダ回路
JPH0770230B2 (ja) * 1985-04-18 1995-07-31 日本電気株式会社 半導体メモリ

Also Published As

Publication number Publication date
EP0317939A3 (de) 1991-04-24
EP0317939B1 (de) 1994-03-09
EP0317939A2 (de) 1989-05-31
DE3888294T2 (de) 1994-06-23
KR930000958B1 (en) 1993-02-11
US4910710A (en) 1990-03-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee