DE3881032D1 - Verbindungssystem von hoher leistungsfaehigkeit fuer eine integrierte schaltung. - Google Patents

Verbindungssystem von hoher leistungsfaehigkeit fuer eine integrierte schaltung.

Info

Publication number
DE3881032D1
DE3881032D1 DE8888108375T DE3881032T DE3881032D1 DE 3881032 D1 DE3881032 D1 DE 3881032D1 DE 8888108375 T DE8888108375 T DE 8888108375T DE 3881032 T DE3881032 T DE 3881032T DE 3881032 D1 DE3881032 D1 DE 3881032D1
Authority
DE
Germany
Prior art keywords
forming
layer
integrated circuit
high efficiency
dielectric layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888108375T
Other languages
English (en)
Other versions
DE3881032T2 (de
Inventor
Michael E Thomas
Jeffrey D Chinn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Semiconductor Corp filed Critical Fairchild Semiconductor Corp
Application granted granted Critical
Publication of DE3881032D1 publication Critical patent/DE3881032D1/de
Publication of DE3881032T2 publication Critical patent/DE3881032T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4821—Bridge structure with air gap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE19883881032 1988-05-26 1988-05-26 Verbindungssystem von hoher Leistungsfähigkeit für eine integrierte Schaltung. Expired - Fee Related DE3881032T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP19880108375 EP0343269B1 (de) 1988-05-26 1988-05-26 Verbindungssystem von hoher Leistungsfähigkeit für eine integrierte Schaltung

Publications (2)

Publication Number Publication Date
DE3881032D1 true DE3881032D1 (de) 1993-06-17
DE3881032T2 DE3881032T2 (de) 1993-11-25

Family

ID=8199000

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19883881032 Expired - Fee Related DE3881032T2 (de) 1988-05-26 1988-05-26 Verbindungssystem von hoher Leistungsfähigkeit für eine integrierte Schaltung.

Country Status (2)

Country Link
EP (1) EP0343269B1 (de)
DE (1) DE3881032T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0507881A1 (de) * 1990-01-04 1992-10-14 International Business Machines Corporation Halbleiter-verbindungsstruktur mit einer polyimid-isolierschicht
US5171713A (en) * 1990-01-10 1992-12-15 Micrunity Systems Eng Process for forming planarized, air-bridge interconnects on a semiconductor substrate
ES2087968T3 (es) * 1990-03-23 1996-08-01 At & T Corp Interconexion de circuito integrado.
US5268329A (en) * 1990-05-31 1993-12-07 At&T Bell Laboratories Method of fabricating an integrated circuit interconnection
JPH04268750A (ja) * 1991-02-25 1992-09-24 Toshiba Corp 半導体集積回路
US5338897A (en) * 1991-07-30 1994-08-16 Texas Instruments, Incorporated Coaxial shield for a semiconductor device
US5300813A (en) * 1992-02-26 1994-04-05 International Business Machines Corporation Refractory metal capped low resistivity metal conductor lines and vias
US5665991A (en) * 1992-03-13 1997-09-09 Texas Instruments Incorporated Device having current ballasting and busing over active area using a multi-level conductor process
US5457068A (en) * 1992-11-30 1995-10-10 Texas Instruments Incorporated Monolithic integration of microwave silicon devices and low loss transmission lines
US5403780A (en) * 1993-06-04 1995-04-04 Jain; Vivek Method enhancing planarization etchback margin, reliability, and stability of a semiconductor device
JP3887035B2 (ja) 1995-12-28 2007-02-28 株式会社東芝 半導体装置の製造方法
DE69827851T2 (de) * 1997-03-25 2005-11-24 Amitec-Advanced Multilayer Interconnect Technologies Ltd. Elektronische Verdrahtungsstruktur

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4670091A (en) * 1984-08-23 1987-06-02 Fairchild Semiconductor Corporation Process for forming vias on integrated circuits
US4601915A (en) * 1984-09-24 1986-07-22 Motorola, Inc. Method of fabricating air supported crossovers
CA1265258A (en) * 1985-03-15 1990-01-30 Michael Thomas High temperature interconnect system for an integrated circuit

Also Published As

Publication number Publication date
EP0343269B1 (de) 1993-05-12
DE3881032T2 (de) 1993-11-25
EP0343269A1 (de) 1989-11-29

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee