DE3865058D1 - Isolationsverfahren mit einer durch eine schutzschicht aus oxid geschuetzten zwischenschicht. - Google Patents

Isolationsverfahren mit einer durch eine schutzschicht aus oxid geschuetzten zwischenschicht.

Info

Publication number
DE3865058D1
DE3865058D1 DE8888400389T DE3865058T DE3865058D1 DE 3865058 D1 DE3865058 D1 DE 3865058D1 DE 8888400389 T DE8888400389 T DE 8888400389T DE 3865058 T DE3865058 T DE 3865058T DE 3865058 D1 DE3865058 D1 DE 3865058D1
Authority
DE
Germany
Prior art keywords
interlayer
protected
oxide
protective layer
insulation method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8888400389T
Other languages
English (en)
Inventor
Yu-Pin Han
Fu-Tai Liou
Frank R Bryant
Tsin C Chan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
SGS Thomson Microelectronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics Inc filed Critical SGS Thomson Microelectronics Inc
Application granted granted Critical
Publication of DE3865058D1 publication Critical patent/DE3865058D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
  • Weting (AREA)
  • Drying Of Semiconductors (AREA)
DE8888400389T 1987-02-24 1988-02-19 Isolationsverfahren mit einer durch eine schutzschicht aus oxid geschuetzten zwischenschicht. Expired - Fee Related DE3865058D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US1735787A 1987-02-24 1987-02-24

Publications (1)

Publication Number Publication Date
DE3865058D1 true DE3865058D1 (de) 1991-10-31

Family

ID=21782131

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8888400389T Expired - Fee Related DE3865058D1 (de) 1987-02-24 1988-02-19 Isolationsverfahren mit einer durch eine schutzschicht aus oxid geschuetzten zwischenschicht.

Country Status (4)

Country Link
EP (1) EP0284456B1 (de)
JP (1) JPS63299144A (de)
KR (1) KR880010478A (de)
DE (1) DE3865058D1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4981813A (en) * 1987-02-24 1991-01-01 Sgs-Thomson Microelectronics, Inc. Pad oxide protect sealed interface isolation process
IT1225636B (it) * 1988-12-15 1990-11-22 Sgs Thomson Microelectronics Metodo di scavo con profilo di fondo arrotondato per strutture di isolamento incassate nel silicio
GB2238658B (en) * 1989-11-23 1993-02-17 Stc Plc Improvements in integrated circuits
JPH04127433A (ja) * 1990-09-18 1992-04-28 Sharp Corp 半導体素子分離領域の形成方法
KR930011458B1 (ko) * 1990-11-17 1993-12-08 삼성전자 주식회사 반도체장치의 필드산화막 형성방법
EP0687001B1 (de) * 1994-06-08 2002-01-16 Samsung Electronics Co., Ltd. Verfahren zur Isolierung von Teilen einer Halbleitervorrichtung
EP0773582A3 (de) * 1995-11-13 1999-07-14 Texas Instruments Incorporated Verfahren zur Herstellung einer Grabenstruktur für die Isolation in einer integrierten Schaltung
KR100209367B1 (ko) * 1996-04-22 1999-07-15 김영환 반도체 소자의 소자분리 절연막 형성방법
KR100211547B1 (ko) * 1996-10-29 1999-08-02 김영환 반도체 소자의 필드 산화막 형성방법
KR100232887B1 (ko) * 1996-12-20 1999-12-01 김영환 필드 산화막 제조방법
US6306726B1 (en) * 1999-08-30 2001-10-23 Micron Technology, Inc. Method of forming field oxide

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59214237A (ja) * 1983-05-20 1984-12-04 Toshiba Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
KR880010478A (ko) 1988-10-10
EP0284456A1 (de) 1988-09-28
JPS63299144A (ja) 1988-12-06
EP0284456B1 (de) 1991-09-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee