DE3856363D1 - Verfahren zur Herstellung kristalliner Artikel - Google Patents

Verfahren zur Herstellung kristalliner Artikel

Info

Publication number
DE3856363D1
DE3856363D1 DE3856363T DE3856363T DE3856363D1 DE 3856363 D1 DE3856363 D1 DE 3856363D1 DE 3856363 T DE3856363 T DE 3856363T DE 3856363 T DE3856363 T DE 3856363T DE 3856363 D1 DE3856363 D1 DE 3856363D1
Authority
DE
Germany
Prior art keywords
production
crystalline articles
crystalline
articles
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3856363T
Other languages
English (en)
Other versions
DE3856363T2 (de
Inventor
Hidemasa Mizutani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Publication of DE3856363D1 publication Critical patent/DE3856363D1/de
Application granted granted Critical
Publication of DE3856363T2 publication Critical patent/DE3856363T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H01L21/02645—Seed materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/78654—Monocrystalline silicon transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Recrystallisation Techniques (AREA)
DE19883856363 1987-01-26 1988-01-25 Verfahren zur Herstellung kristalliner Artikel Expired - Fee Related DE3856363T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62014102A JP2651144B2 (ja) 1987-01-26 1987-01-26 結晶基材の製造方法

Publications (2)

Publication Number Publication Date
DE3856363D1 true DE3856363D1 (de) 1999-10-28
DE3856363T2 DE3856363T2 (de) 2000-04-20

Family

ID=11851756

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19883856363 Expired - Fee Related DE3856363T2 (de) 1987-01-26 1988-01-25 Verfahren zur Herstellung kristalliner Artikel

Country Status (3)

Country Link
EP (1) EP0276959B1 (de)
JP (1) JP2651144B2 (de)
DE (1) DE3856363T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63119218A (ja) * 1986-11-07 1988-05-23 Canon Inc 半導体基材とその製造方法
JPH04165672A (ja) * 1990-10-29 1992-06-11 Mitsubishi Electric Corp 埋込み型光電子集積素子の製造方法
JP2900588B2 (ja) * 1990-11-16 1999-06-02 キヤノン株式会社 結晶物品の形成方法
JP2744350B2 (ja) * 1990-11-22 1998-04-28 キヤノン株式会社 半導体基板およびその製造方法
US5387538A (en) * 1992-09-08 1995-02-07 Texas Instruments, Incorporated Method of fabrication of integrated circuit isolation structure

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2305188A1 (de) * 1973-02-02 1974-08-08 Wacker Chemitronic Verfahren zur herstellung von polierten halbleiteroberflaechen
US4239788A (en) * 1979-06-15 1980-12-16 Martin Marietta Corporation Method for the production of semiconductor devices using electron beam delineation
JPS58114419A (ja) * 1981-12-28 1983-07-07 Fujitsu Ltd 半導体装置用基板の製造方法
JPS58185500A (ja) * 1982-04-21 1983-10-29 Nec Corp シリコン膜製造法
JPS5969495A (ja) * 1982-10-13 1984-04-19 Nippon Telegr & Teleph Corp <Ntt> シリコン単結晶膜の形成方法
JPS5969798A (ja) * 1982-10-14 1984-04-20 松下電器産業株式会社 ピツチ抽出方法
JPH0782996B2 (ja) * 1986-03-28 1995-09-06 キヤノン株式会社 結晶の形成方法
CA1337170C (en) * 1986-03-31 1995-10-03 Jinsho Matsuyama Method for forming crystalline deposited film

Also Published As

Publication number Publication date
EP0276959B1 (de) 1999-09-22
DE3856363T2 (de) 2000-04-20
EP0276959A2 (de) 1988-08-03
JPS63182809A (ja) 1988-07-28
EP0276959A3 (de) 1988-10-19
JP2651144B2 (ja) 1997-09-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee