DE3855431D1 - Zwei moden treiberschaltung - Google Patents

Zwei moden treiberschaltung

Info

Publication number
DE3855431D1
DE3855431D1 DE3855431T DE3855431T DE3855431D1 DE 3855431 D1 DE3855431 D1 DE 3855431D1 DE 3855431 T DE3855431 T DE 3855431T DE 3855431 T DE3855431 T DE 3855431T DE 3855431 D1 DE3855431 D1 DE 3855431D1
Authority
DE
Germany
Prior art keywords
fashion
driver circuit
driver
circuit
fashion driver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3855431T
Other languages
English (en)
Other versions
DE3855431T2 (de
Inventor
Anthony Wong
Daniel Wong
Steven Chan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LSI Corp
Original Assignee
LSI Logic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LSI Logic Corp filed Critical LSI Logic Corp
Publication of DE3855431D1 publication Critical patent/DE3855431D1/de
Application granted granted Critical
Publication of DE3855431T2 publication Critical patent/DE3855431T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018585—Coupling arrangements; Interface arrangements using field effect transistors only programmable
DE3855431T 1987-10-14 1988-10-11 Zwei moden treiberschaltung Expired - Fee Related DE3855431T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10833387A 1987-10-14 1987-10-14
PCT/US1988/003510 WO1989003614A1 (en) 1987-10-14 1988-10-11 Two-mode driver circuit

Publications (2)

Publication Number Publication Date
DE3855431D1 true DE3855431D1 (de) 1996-08-22
DE3855431T2 DE3855431T2 (de) 1996-11-21

Family

ID=22321603

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3855431T Expired - Fee Related DE3855431T2 (de) 1987-10-14 1988-10-11 Zwei moden treiberschaltung

Country Status (4)

Country Link
EP (1) EP0340282B1 (de)
JP (1) JP2796103B2 (de)
DE (1) DE3855431T2 (de)
WO (1) WO1989003614A1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0432313A (ja) * 1990-05-29 1992-02-04 Toshiba Corp 出力回路
JP2623918B2 (ja) * 1990-06-04 1997-06-25 日本電気株式会社 出力バッファ回路
US5192881A (en) * 1991-06-28 1993-03-09 Vlsi Technology, Inc. Circuit which reduces noise caused by high current outputs
JP3247128B2 (ja) * 1991-10-09 2002-01-15 富士通株式会社 可変遅延回路
US5311084A (en) * 1992-06-23 1994-05-10 At&T Bell Laboratories Integrated circuit buffer with controlled rise/fall time
US5315174A (en) * 1992-08-13 1994-05-24 Advanced Micro Devices, Inc. Programmable output slew rate control
US5300828A (en) * 1992-08-31 1994-04-05 Sgs-Thomson Microelectronics, Inc. Slew rate limited output buffer with bypass circuitry
DE4233850C1 (de) * 1992-10-08 1994-06-23 Itt Ind Gmbh Deutsche Schaltungsanordnung zur Stromeinstellung eines monolithisch integrierten Padtreibers
US5367206A (en) * 1993-06-17 1994-11-22 Advanced Micro Devices, Inc. Output buffer circuit for a low voltage EPROM
GB2289808A (en) * 1994-05-19 1995-11-29 Motorola Gmbh CMOS driver with programmable switching speed
KR970005570B1 (ko) * 1994-07-14 1997-04-17 현대전자산업 주식회사 데이타 출력버퍼
EP0717501A1 (de) * 1994-12-15 1996-06-19 Advanced Micro Devices, Inc. Pufferschaltung mit programmierbarer Treibfähigkeit
JP2001144603A (ja) * 1999-11-18 2001-05-25 Oki Micro Design Co Ltd レベルシフタ回路およびそれを含むデータ出力回路
JP4692134B2 (ja) * 2005-08-05 2011-06-01 ヤマハ株式会社 出力バッファ回路

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5772429A (en) * 1980-10-22 1982-05-06 Toshiba Corp Semiconductor integrated circuit device
JPS5949020A (ja) * 1982-09-13 1984-03-21 Toshiba Corp 論理回路
NL8301711A (nl) * 1983-05-13 1984-12-03 Philips Nv Complementaire igfet schakeling.
JPS59208926A (ja) * 1983-05-13 1984-11-27 Hitachi Ltd シユミツトトリガ回路
US4567378A (en) * 1984-06-13 1986-01-28 International Business Machines Corporation Driver circuit for controlling signal rise and fall in field effect transistor processors
US4622482A (en) * 1985-08-30 1986-11-11 Motorola, Inc. Slew rate limited driver circuit which minimizes crossover distortion
JP2770941B2 (ja) * 1985-12-10 1998-07-02 シチズン時計株式会社 シユミツトトリガ回路
US4725747A (en) * 1986-08-29 1988-02-16 Texas Instruments Incorporated Integrated circuit distributed geometry to reduce switching noise
JP2777571B2 (ja) * 1991-11-29 1998-07-16 大同鋼板株式会社 アルミニウム−亜鉛−シリコン合金めっき被覆物及びその製造方法

Also Published As

Publication number Publication date
EP0340282A1 (de) 1989-11-08
EP0340282B1 (de) 1996-07-17
EP0340282A4 (en) 1991-12-27
DE3855431T2 (de) 1996-11-21
JP2796103B2 (ja) 1998-09-10
WO1989003614A1 (en) 1989-04-20
JPH02501972A (ja) 1990-06-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee