DE3851518D1 - TTL-kompatible Umschalterschaltung mit gesteuerter Ausgangssteilheit. - Google Patents

TTL-kompatible Umschalterschaltung mit gesteuerter Ausgangssteilheit.

Info

Publication number
DE3851518D1
DE3851518D1 DE3851518T DE3851518T DE3851518D1 DE 3851518 D1 DE3851518 D1 DE 3851518D1 DE 3851518 T DE3851518 T DE 3851518T DE 3851518 T DE3851518 T DE 3851518T DE 3851518 D1 DE3851518 D1 DE 3851518D1
Authority
DE
Germany
Prior art keywords
ttl
compatible
controlled output
switchover circuit
output slope
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3851518T
Other languages
English (en)
Other versions
DE3851518T2 (de
Inventor
Derrell Quentin Johnson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of DE3851518D1 publication Critical patent/DE3851518D1/de
Publication of DE3851518T2 publication Critical patent/DE3851518T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00353—Modifications for eliminating interference or parasitic voltages or currents in bipolar transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H03K17/66—Switching arrangements for passing the current in either direction at will; Switching arrangements for reversing the current at will
    • H03K17/665—Switching arrangements for passing the current in either direction at will; Switching arrangements for reversing the current at will connected to one load terminal only
    • H03K17/666—Switching arrangements for passing the current in either direction at will; Switching arrangements for reversing the current at will connected to one load terminal only the output circuit comprising more than one controlled bipolar transistor

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
DE3851518T 1987-12-18 1988-12-13 TTL-kompatible Umschalterschaltung mit gesteuerter Ausgangssteilheit. Expired - Fee Related DE3851518T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/134,494 US4855622A (en) 1987-12-18 1987-12-18 TTL compatible switching circuit having controlled ramp output

Publications (2)

Publication Number Publication Date
DE3851518D1 true DE3851518D1 (de) 1994-10-20
DE3851518T2 DE3851518T2 (de) 1995-04-13

Family

ID=22463652

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3851518T Expired - Fee Related DE3851518T2 (de) 1987-12-18 1988-12-13 TTL-kompatible Umschalterschaltung mit gesteuerter Ausgangssteilheit.

Country Status (5)

Country Link
US (1) US4855622A (de)
EP (1) EP0321052B1 (de)
JP (1) JPH022712A (de)
KR (1) KR890011218A (de)
DE (1) DE3851518T2 (de)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4958090A (en) * 1989-03-06 1990-09-18 National Semiconductor Corporation Non-current hogging dual phase splitter TTL circuit
JPH088484B2 (ja) * 1989-07-27 1996-01-29 日本電気株式会社 エミッタフォロワ回路
US5023481A (en) * 1989-12-27 1991-06-11 North American Philips Corporation Totem pole circuit with additional diode coupling
US5206546A (en) * 1990-03-16 1993-04-27 Hitachi, Ltd. Logic circuit including variable impedance means
US5028817A (en) * 1990-06-14 1991-07-02 Zoran Corporation Tristable output buffer with state transition control
US5034632A (en) * 1990-06-19 1991-07-23 National Semiconductor Corporation High speed TTL buffer circuit and line driver
JPH04150226A (ja) * 1990-10-09 1992-05-22 Mitsubishi Electric Corp 半導体集積回路
US5266847A (en) * 1990-12-28 1993-11-30 National Semiconductor Corporation High speed data transceiver
JP2737444B2 (ja) * 1991-04-30 1998-04-08 日本電気株式会社 高速論理回路
JP2821714B2 (ja) * 1991-07-09 1998-11-05 マイクロ・リニア・コーポレーション 交差導通電流を減少させる電力用ｍｏｓｆｅｔ駆動回路
US5408133A (en) * 1993-05-03 1995-04-18 Delco Electronics Corporation Ramp control circuit
US5543746A (en) * 1993-06-08 1996-08-06 National Semiconductor Corp. Programmable CMOS current source having positive temperature coefficient
US5539341A (en) * 1993-06-08 1996-07-23 National Semiconductor Corporation CMOS bus and transmission line driver having programmable edge rate control
US5483184A (en) * 1993-06-08 1996-01-09 National Semiconductor Corporation Programmable CMOS bus and transmission line receiver
EP0702813B1 (de) * 1993-06-08 2001-08-22 National Semiconductor Corporation Programmierbarer cmos bus- und übertragungsleitungstreiber
US5557223A (en) * 1993-06-08 1996-09-17 National Semiconductor Corporation CMOS bus and transmission line driver having compensated edge rate control
EP0702859B1 (de) * 1993-06-08 1998-07-01 National Semiconductor Corporation Btl kompatibler cmos leitungstreiber
US5530386A (en) * 1993-11-24 1996-06-25 National Semiconductor Corporation Storage charge reduction circuit for bipolar input/output devices
US5818260A (en) * 1996-04-24 1998-10-06 National Semiconductor Corporation Transmission line driver having controllable rise and fall times with variable output low and minimal on/off delay
US5757217A (en) * 1996-06-28 1998-05-26 Intel Corporation Slow speed driver with controlled slew rate
JPH11285239A (ja) * 1998-03-27 1999-10-15 Toyota Autom Loom Works Ltd スイッチング素子を駆動する回路
US6362678B1 (en) * 1999-12-21 2002-03-26 Sun Microsystems, Inc. Circuit for reducing rise/fall times for high speed transistor logic
US6653878B2 (en) * 2001-09-24 2003-11-25 Microchip Technology Inc. Low-power output controlled circuit
US6988217B1 (en) 2002-02-27 2006-01-17 Advanced Micro Devices, Inc. Method and mechanism for generating a clock signal with a relatively linear increase or decrease in clock frequency
US7747881B2 (en) * 2006-08-14 2010-06-29 Globalfoundries Inc. System and method for limiting processor performance
US7895421B2 (en) * 2007-07-12 2011-02-22 Globalfoundries Inc. Mechanism for using performance counters to identify reasons and delay times for instructions that are stalled during retirement
US8504854B2 (en) 2010-06-21 2013-08-06 Advanced Micro Devices, Inc. Managing multiple operating points for stable virtual frequencies
US9261949B2 (en) 2010-10-29 2016-02-16 Advanced Micro Devices, Inc. Method for adaptive performance optimization of the soc
US10063073B2 (en) * 2014-05-21 2018-08-28 Dialog Semiconductor Inc. USB power converter with bleeder circuit for fast correction of output voltage by discharging output capacitor
US10931280B2 (en) * 2019-02-05 2021-02-23 Texas Instruments Incorporated Bipolar junction transistor buffer

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4306159A (en) * 1979-06-14 1981-12-15 International Business Machines Corporation Bipolar inverter and NAND logic circuit with extremely low DC standby power
DE3275895D1 (en) * 1981-09-26 1987-04-30 Fujitsu Ltd A ttl circuit
JPS5933051A (ja) * 1982-08-17 1984-02-22 Tokyo Seat Kk 車両用シ−トのバネ取付装置
JPS59158126A (ja) * 1983-02-28 1984-09-07 Toyo Electric Mfg Co Ltd 自己消弧形サイリスタのアブゾ−バ回路
US4567378A (en) * 1984-06-13 1986-01-28 International Business Machines Corporation Driver circuit for controlling signal rise and fall in field effect transistor processors
US4698525A (en) * 1985-12-03 1987-10-06 Monolithic Memories, Inc. Buffered Miller current compensating circuit
US4697103A (en) * 1986-03-10 1987-09-29 Quadic Systems, Inc. Low power high current sinking TTL circuit

Also Published As

Publication number Publication date
KR890011218A (ko) 1989-08-14
EP0321052A2 (de) 1989-06-21
US4855622A (en) 1989-08-08
EP0321052B1 (de) 1994-09-14
EP0321052A3 (en) 1989-12-06
DE3851518T2 (de) 1995-04-13
JPH022712A (ja) 1990-01-08

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: PHILIPS ELECTRONICS N.V., EINDHOVEN, NL

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee