DE3850212D1 - Vielfach-CPU-System mit gemeinschaftlichem Speicher. - Google Patents

Vielfach-CPU-System mit gemeinschaftlichem Speicher.

Info

Publication number
DE3850212D1
DE3850212D1 DE3850212T DE3850212T DE3850212D1 DE 3850212 D1 DE3850212 D1 DE 3850212D1 DE 3850212 T DE3850212 T DE 3850212T DE 3850212 T DE3850212 T DE 3850212T DE 3850212 D1 DE3850212 D1 DE 3850212D1
Authority
DE
Germany
Prior art keywords
shared memory
cpu system
multiple cpu
shared
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3850212T
Other languages
English (en)
Other versions
DE3850212T2 (de
Inventor
Yasuo Masuo
Masayuki Iwatsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Publication of DE3850212D1 publication Critical patent/DE3850212D1/de
Application granted granted Critical
Publication of DE3850212T2 publication Critical patent/DE3850212T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
DE3850212T 1987-10-26 1988-10-25 Vielfach-CPU-System mit gemeinschaftlichem Speicher. Expired - Lifetime DE3850212T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP26957487 1987-10-26
JP63158840A JP2749819B2 (ja) 1987-10-26 1988-06-27 共有メモリ制御方式

Publications (2)

Publication Number Publication Date
DE3850212D1 true DE3850212D1 (de) 1994-07-21
DE3850212T2 DE3850212T2 (de) 1994-09-22

Family

ID=26485834

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3850212T Expired - Lifetime DE3850212T2 (de) 1987-10-26 1988-10-25 Vielfach-CPU-System mit gemeinschaftlichem Speicher.

Country Status (4)

Country Link
US (1) US5155855A (de)
EP (1) EP0314069B1 (de)
JP (1) JP2749819B2 (de)
DE (1) DE3850212T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5341473A (en) * 1990-08-09 1994-08-23 Nec Corporation System of transferring data in a multi-CPU arrangement using address generators
GB9018992D0 (en) * 1990-08-31 1990-10-17 Ncr Co Internal bus for work station interfacing means
AU4400893A (en) * 1992-06-12 1994-01-04 Dow Chemical Company, The Stealth interface for process control computers
US5495588A (en) * 1993-11-18 1996-02-27 Allen-Bradley Company, Inc. Programmable controller having joined relay language processor and general purpose processor
US5732757A (en) * 1996-05-10 1998-03-31 Jvm Innovation & Design Llc Slotted panel and strap combination
FR2765006B1 (fr) * 1997-06-18 1999-07-16 Schlumberger Ind Sa Dispositif d'echange de donnees asynchrones entre deux microprocesseurs
WO2000000903A1 (fr) * 1998-06-30 2000-01-06 Mitsubishi Denki Kabushiki Kaisha Processeur central multiple
KR100598488B1 (ko) 2004-11-03 2006-07-11 주식회사 팬택 원격 함수 제어 기능을 가지는 개인 휴대 단말기 및 그 방법

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2462745B1 (fr) * 1979-07-30 1986-01-03 Jeumont Schneider Dispositif de partage temporel de l'acces a une memoire connectee a un bus unique entre un calculateur central et une pluralite de calculateurs peripheriques
JPS56123047A (en) * 1980-03-04 1981-09-26 Mitsubishi Electric Corp Electronic computer device
US4395753A (en) * 1980-06-26 1983-07-26 Gte Automatic Electric Labs Inc. Allocation controller providing for access of multiple common resources by a plurality of central processing units
US4415972A (en) * 1980-12-29 1983-11-15 Sperry Corporation Dual port memory interlock
US4633392A (en) * 1982-04-05 1986-12-30 Texas Instruments Incorporated Self-configuring digital processor system with logical arbiter
IT1151683B (it) * 1982-07-06 1986-12-24 Honeywell Inf Systems Sistema multiprocessore a bus asincrono con caricamento di microistruzioni da memoria di lavoro
US4698753A (en) * 1982-11-09 1987-10-06 Texas Instruments Incorporated Multiprocessor interface device
IT1161467B (it) * 1983-01-21 1987-03-18 Cselt Centro Studi Lab Telecom Interfaccia di tipo parallelo per la gestione del colloquio tra un bus asincrono e un bus sincrono collegato a piu terminali dotati ognuno di un proprio segnale di sincronizzazione
US4594657A (en) * 1983-04-22 1986-06-10 Motorola, Inc. Semaphore for memory shared by two asynchronous microcomputers
JPS60247767A (ja) * 1984-05-24 1985-12-07 Nec Corp 共有メモリの読出し書き込み動作の同時入出力方式
US4669044A (en) * 1984-07-02 1987-05-26 Ncr Corporation High speed data transmission system
CA1239227A (en) * 1984-10-17 1988-07-12 Randy D. Pfeifer Method of and arrangement for ordering of multiprocessor operations in a multiprocessor system
US4641238A (en) * 1984-12-10 1987-02-03 Itt Corporation Multiprocessor system employing dynamically programmable processing elements controlled by a master processor
US4722048A (en) * 1985-04-03 1988-01-26 Honeywell Bull Inc. Microcomputer system with independent operating systems
JPS6257050A (ja) * 1985-09-06 1987-03-12 Nippon Signal Co Ltd:The 共有メモリ装置
US4797815A (en) * 1985-11-22 1989-01-10 Paradyne Corporation Interleaved synchronous bus access protocol for a shared memory multi-processor system
DE3778920D1 (de) * 1986-01-20 1992-06-17 Nec Corp Mikrorechner mit betriebsarten fuer hohe und fuer geringe taktrate.
US4780822A (en) * 1986-09-17 1988-10-25 Integrated Device Technology, Inc. Semaphore circuit for shared memory cells
US4761735A (en) * 1986-12-19 1988-08-02 Ncr Corporation Data transfer circuit between a processor and a peripheral
FR2611396B1 (fr) * 1987-02-27 1991-10-11 Trt Telecom Radio Electr Dispositif pour permettre a deux systemes de traitement d'informations l'acces a un circuit commun
US4866664A (en) * 1987-03-09 1989-09-12 Unisys Corporation Intercomputer communication control apparatus & method

Also Published As

Publication number Publication date
EP0314069A2 (de) 1989-05-03
EP0314069B1 (de) 1994-06-15
JPH01199261A (ja) 1989-08-10
US5155855A (en) 1992-10-13
EP0314069A3 (en) 1989-12-27
DE3850212T2 (de) 1994-09-22
JP2749819B2 (ja) 1998-05-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)