DE3788756D1 - Wort-Scheibesignalprozessor. - Google Patents

Wort-Scheibesignalprozessor.

Info

Publication number
DE3788756D1
DE3788756D1 DE87306474T DE3788756T DE3788756D1 DE 3788756 D1 DE3788756 D1 DE 3788756D1 DE 87306474 T DE87306474 T DE 87306474T DE 3788756 T DE3788756 T DE 3788756T DE 3788756 D1 DE3788756 D1 DE 3788756D1
Authority
DE
Germany
Prior art keywords
slice
word
signal processor
disk signal
applications
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE87306474T
Other languages
English (en)
Other versions
DE3788756T2 (de
Inventor
Safdar M Asghar
Hwa-Sheng Pyi
Dermot Dunnion
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE3788756D1 publication Critical patent/DE3788756D1/de
Application granted granted Critical
Publication of DE3788756T2 publication Critical patent/DE3788756T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G06F7/5324—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel partitioned, i.e. using repetitively a smaller parallel parallel multiplier or using an array of such smaller multipliers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7896—Modular architectures, e.g. assembled from a number of identical packages

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Filters That Use Time-Delay Elements (AREA)
  • Saccharide Compounds (AREA)
DE3788756T 1986-07-30 1987-07-22 Wort-Scheibesignalprozessor. Expired - Lifetime DE3788756T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/891,713 US4800517A (en) 1986-07-30 1986-07-30 Word-sliced signal processor

Publications (2)

Publication Number Publication Date
DE3788756D1 true DE3788756D1 (de) 1994-02-24
DE3788756T2 DE3788756T2 (de) 1994-07-28

Family

ID=25398695

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3788756T Expired - Lifetime DE3788756T2 (de) 1986-07-30 1987-07-22 Wort-Scheibesignalprozessor.

Country Status (5)

Country Link
US (1) US4800517A (de)
EP (1) EP0255285B1 (de)
JP (1) JP3081938B2 (de)
AT (1) ATE100225T1 (de)
DE (1) DE3788756T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5126964A (en) * 1988-04-01 1992-06-30 Digital Equipment Corporation High performance bit-sliced multiplier circuit
US5010509A (en) * 1988-10-05 1991-04-23 United Technologies Corporation Accumulator for complex numbers
US5130797A (en) * 1989-02-27 1992-07-14 Mitsubishi Denki Kabushiki Kaisha Digital signal processing system for parallel processing of subsampled data
US5477479A (en) * 1993-03-08 1995-12-19 Nkk Corporation Multiplying system having multi-stages for processing a digital signal based on the Booth's algorithm
ATE185204T1 (de) * 1993-08-09 1999-10-15 Siemens Ag Signalverarbeitungseinrichtung
US5530661A (en) * 1994-10-05 1996-06-25 Winnov Data bit-slicing apparatus and method for computing convolutions
US20110153995A1 (en) * 2009-12-18 2011-06-23 Electronics And Telecommunications Research Institute Arithmetic apparatus including multiplication and accumulation, and dsp structure and filtering method using the same
US11539833B1 (en) * 2020-01-10 2022-12-27 Amazon Technologies, Inc. Robust step-size control for multi-channel acoustic echo canceller

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3260840A (en) * 1961-12-28 1966-07-12 Ibm Variable mode arithmetic circuits with carry select
US3752971A (en) * 1971-10-18 1973-08-14 Hughes Aircraft Co Expandable sum of cross product multiplier/adder module
US3814924A (en) * 1973-03-12 1974-06-04 Control Data Corp Pipeline binary multiplier
BE844199A (nl) * 1976-07-16 1976-11-16 Inrichting voor het vermenigvuldigen van binaire getallen
US4208722A (en) * 1978-01-23 1980-06-17 Data General Corporation Floating point data processing system
US4190894A (en) * 1978-03-10 1980-02-26 Digital Equipment Corporation High speed parallel multiplication apparatus with single-step summand reduction
JPS6036831B2 (ja) * 1978-07-05 1985-08-22 三菱レイヨン株式会社 ヒ素及びシリカ含有水の処理方法
JPS58137045A (ja) * 1982-02-05 1983-08-15 Matsushita Electric Ind Co Ltd 並列乗算器
US4454589A (en) * 1982-03-12 1984-06-12 The Unite States of America as represented by the Secretary of the Air Force Programmable arithmetic logic unit
JPS60112141A (ja) * 1983-11-22 1985-06-18 Sony Corp 乗算回路
JPH0624310B2 (ja) * 1984-06-22 1994-03-30 ソニー株式会社 デイジタルフイルタ
JPH0666638B2 (ja) * 1984-06-22 1994-08-24 ソニー株式会社 デイジタルフイルタ

Also Published As

Publication number Publication date
EP0255285A2 (de) 1988-02-03
EP0255285A3 (en) 1990-10-10
EP0255285B1 (de) 1994-01-12
US4800517A (en) 1989-01-24
JP3081938B2 (ja) 2000-08-28
ATE100225T1 (de) 1994-01-15
DE3788756T2 (de) 1994-07-28
JPS6338332A (ja) 1988-02-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition