DE3787235D1 - Übertragungssysteme mit Paketbildung. - Google Patents

Übertragungssysteme mit Paketbildung.

Info

Publication number
DE3787235D1
DE3787235D1 DE87108926T DE3787235T DE3787235D1 DE 3787235 D1 DE3787235 D1 DE 3787235D1 DE 87108926 T DE87108926 T DE 87108926T DE 3787235 T DE3787235 T DE 3787235T DE 3787235 D1 DE3787235 D1 DE 3787235D1
Authority
DE
Germany
Prior art keywords
transmission systems
packet formation
packet
formation
systems
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE87108926T
Other languages
English (en)
Other versions
DE3787235T2 (de
Inventor
Douglas Roderick Chisholm
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE3787235D1 publication Critical patent/DE3787235D1/de
Application granted granted Critical
Publication of DE3787235T2 publication Critical patent/DE3787235T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
  • Separation By Low-Temperature Treatments (AREA)
  • Communication Control (AREA)
DE19873787235 1986-08-01 1987-06-23 Übertragungssysteme mit Paketbildung. Expired - Fee Related DE3787235T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US89184586A 1986-08-01 1986-08-01

Publications (2)

Publication Number Publication Date
DE3787235D1 true DE3787235D1 (de) 1993-10-07
DE3787235T2 DE3787235T2 (de) 1994-04-21

Family

ID=25398921

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19873787235 Expired - Fee Related DE3787235T2 (de) 1986-08-01 1987-06-23 Übertragungssysteme mit Paketbildung.

Country Status (3)

Country Link
EP (1) EP0255593B1 (de)
JP (2) JPH0772886B2 (de)
DE (1) DE3787235T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5073969A (en) * 1988-08-01 1991-12-17 Intel Corporation Microprocessor bus interface unit which changes scheduled data transfer indications upon sensing change in enable signals before receiving ready signal
US5119498A (en) * 1989-06-12 1992-06-02 International Business Machines Corporation Feature board with automatic adjustment to one of two bus widths based on sensing power level at one connection contact
EP0444711A3 (en) * 1990-03-02 1994-07-20 Fujitsu Ltd Bus control system in a multi-processor system
JP2545482B2 (ja) * 1990-03-15 1996-10-16 富士通株式会社 インタ―フェイス装置の転送パラメ―タ設定方法
KR0181471B1 (ko) * 1990-07-27 1999-05-15 윌리암 피.브레이든 컴퓨터 데이타 경로배정 시스템
IL100127A0 (en) * 1991-03-11 1992-08-18 Future Domain Corp Scsi controller
JPH07504773A (ja) * 1992-03-18 1995-05-25 セイコーエプソン株式会社 マルチ幅のメモリ・サブシステムをサポートするためのシステム並びに方法
US5355682A (en) * 1993-09-15 1994-10-18 Air Products And Chemicals, Inc. Cryogenic air separation process producing elevated pressure nitrogen by pumped liquid nitrogen
JP3635169B2 (ja) * 1996-11-20 2005-04-06 松下電器産業株式会社 データ伝送装置
CN106155013B (zh) * 2015-05-20 2019-01-01 宁夏巨能机器人系统有限公司 一种用于自动化生产线的dnc通讯装置及其通讯方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56132624A (en) * 1980-03-19 1981-10-17 Toshiba Corp Information processor
US4667305A (en) * 1982-06-30 1987-05-19 International Business Machines Corporation Circuits for accessing a variable width data bus with a variable width data field
US4580213A (en) * 1982-07-07 1986-04-01 Motorola, Inc. Microprocessor capable of automatically performing multiple bus cycles
JPS5955525A (ja) * 1982-09-25 1984-03-30 Toshiba Corp マイクロプロセツサ
US4805098A (en) * 1986-05-05 1989-02-14 Mips Computer Systems, Inc. Write buffer

Also Published As

Publication number Publication date
JPH01503481A (ja) 1989-11-22
EP0255593A2 (de) 1988-02-10
JPH0772886B2 (ja) 1995-08-02
EP0255593B1 (de) 1993-09-01
JPS6339072A (ja) 1988-02-19
DE3787235T2 (de) 1994-04-21
EP0255593A3 (en) 1990-05-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee