DE3786046D1 - Verfahren zur herstellung von festkoerpern einrichtungen mit duennen dialektrischen schichten. - Google Patents

Verfahren zur herstellung von festkoerpern einrichtungen mit duennen dialektrischen schichten.

Info

Publication number
DE3786046D1
DE3786046D1 DE8787901849T DE3786046T DE3786046D1 DE 3786046 D1 DE3786046 D1 DE 3786046D1 DE 8787901849 T DE8787901849 T DE 8787901849T DE 3786046 T DE3786046 T DE 3786046T DE 3786046 D1 DE3786046 D1 DE 3786046D1
Authority
DE
Germany
Prior art keywords
dialectric
layers
thin
production
solid body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787901849T
Other languages
English (en)
Other versions
DE3786046T2 (de
Inventor
Sea-Chung Kim
Alvaro Maury
William Henry Stinebaugh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
American Telephone and Telegraph Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Application granted granted Critical
Publication of DE3786046D1 publication Critical patent/DE3786046D1/de
Publication of DE3786046T2 publication Critical patent/DE3786046T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/32105Oxidation of silicon-containing layers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/966Selective oxidation of ion-amorphousized layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Formation Of Insulating Films (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE8787901849T 1986-02-25 1987-02-06 Verfahren zur herstellung von festkoerpern einrichtungen mit duennen dialektrischen schichten. Expired - Fee Related DE3786046T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/833,884 US4814291A (en) 1986-02-25 1986-02-25 Method of making devices having thin dielectric layers
PCT/US1987/000272 WO1987005152A1 (en) 1986-02-25 1987-02-06 Fabrication of solid-state devices having thin dielectric layers

Publications (2)

Publication Number Publication Date
DE3786046D1 true DE3786046D1 (de) 1993-07-08
DE3786046T2 DE3786046T2 (de) 1993-09-09

Family

ID=25265516

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787901849T Expired - Fee Related DE3786046T2 (de) 1986-02-25 1987-02-06 Verfahren zur herstellung von festkoerpern einrichtungen mit duennen dialektrischen schichten.

Country Status (7)

Country Link
US (1) US4814291A (de)
EP (1) EP0258394B1 (de)
JP (1) JPH0691080B2 (de)
KR (1) KR910002433B1 (de)
CA (1) CA1297764C (de)
DE (1) DE3786046T2 (de)
WO (1) WO1987005152A1 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5851871A (en) * 1987-12-23 1998-12-22 Sgs-Thomson Microelectronics, S.R.L. Process for manufacturing integrated capacitors in MOS technology
DE69133003T2 (de) * 1990-01-22 2002-12-12 Silicon Storage Tech Inc Nichtflüchtige elektrisch veränderbare eintransistor-halbleiterspeicheranordnung mit rekristallisiertem schwebendem gate
KR970009976B1 (ko) * 1991-08-26 1997-06-19 아메리칸 텔리폰 앤드 텔레그라프 캄파니 증착된 반도체상에 형성된 개선된 유전체
JP2855919B2 (ja) * 1991-10-24 1999-02-10 日本電気株式会社 半導体装置およびその製造方法
JP3313840B2 (ja) 1993-09-14 2002-08-12 富士通株式会社 半導体装置の製造方法
US6107105A (en) * 1994-05-13 2000-08-22 Micron Technology, Inc. Amorphous tin films for an integrated capacitor dielectric/bottom plate using high dielectric constant material
US6770924B1 (en) 1994-05-13 2004-08-03 Micron Technology, Inc. Amorphous TiN films for an integrated capacitor dielectric/bottom plate using high dielectric constant materials
US5712177A (en) * 1994-08-01 1998-01-27 Motorola, Inc. Method for forming a reverse dielectric stack
US5665620A (en) * 1994-08-01 1997-09-09 Motorola, Inc. Method for forming concurrent top oxides using reoxidized silicon in an EPROM
US5665625A (en) * 1995-05-19 1997-09-09 Micron Technology, Inc. Method of forming capacitors having an amorphous electrically conductive layer
US5780342A (en) * 1996-12-05 1998-07-14 Winbond Electronics Corporation Method for fabricating dielectric films for non-volatile electrically erasable memories
US6017786A (en) * 1997-12-17 2000-01-25 Advanced Micro Devices, Inc. Method for forming a low barrier height oxide layer on a silicon substrate
US7192829B2 (en) * 1998-07-17 2007-03-20 Micron Technology, Inc. Methods of forming floating gate transistors
US6338987B1 (en) 1998-08-27 2002-01-15 Lg.Philips Lcd Co., Ltd. Method for forming polycrystalline silicon layer and method for fabricating thin film transistor
US6177363B1 (en) 1998-09-29 2001-01-23 Lucent Technologies Inc. Method for forming a nitride layer suitable for use in advanced gate dielectric materials
DE60039875D1 (de) 1999-06-25 2008-09-25 Massachusetts Inst Technology Zyklisches thermisches ausheilverfahren zur reduktion von kristallversetzungen
US6294447B1 (en) * 1999-07-12 2001-09-25 Agere Systems Guardian Corp. Method of making devices having thin dielectric layers
US6417070B1 (en) * 2000-12-13 2002-07-09 International Business Machines Corporation Method for forming a liner in a trench
US6548425B2 (en) * 2001-05-10 2003-04-15 Macronix International Co. Ltd. Method for fabricating an ONO layer of an NROM
US6566210B2 (en) * 2001-07-13 2003-05-20 International Business Machines Corporation Method of improving gate activation by employing atomic oxygen enhanced oxidation
DE10148491B4 (de) * 2001-10-01 2006-09-07 Infineon Technologies Ag Verfahren zum Herstellen einer integrierten Halbleiteranordnung mit Hilfe einer thermischen Oxidation und Halbleiteranordnung
US7932189B2 (en) * 2007-01-26 2011-04-26 Freescale Semiconductor, Inc. Process of forming an electronic device including a layer of discontinuous storage elements
US20130162995A1 (en) * 2011-12-27 2013-06-27 Intermolecular, Inc. Layer Thickness Measurement

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4062747A (en) * 1976-06-15 1977-12-13 Bell Telephone Laboratories, Incorporated Native growth of semiconductor oxide layers
US4229232A (en) * 1978-12-11 1980-10-21 Spire Corporation Method involving pulsed beam processing of metallic and dielectric materials
US4300989A (en) * 1979-10-03 1981-11-17 Bell Telephone Laboratories, Incorporated Fluorine enhanced plasma growth of native layers on silicon
JPS5676537A (en) * 1979-11-27 1981-06-24 Fujitsu Ltd Manufacture of semiconductor device
JPS5772333A (en) * 1980-10-23 1982-05-06 Fujitsu Ltd Manufacture of semiconductor device
JPS5946105B2 (ja) * 1981-10-27 1984-11-10 日本電信電話株式会社 バイポ−ラ型トランジスタ装置及びその製法
US4441249A (en) * 1982-05-26 1984-04-10 Bell Telephone Laboratories, Incorporated Semiconductor integrated circuit capacitor
GB2131407B (en) * 1982-11-12 1987-02-04 Rca Corp Method of formation of silicon dioxide layer
US4494301A (en) * 1983-09-01 1985-01-22 Rca Corporation Method of making semiconductor device with multi-levels of polycrystalline silicon conductors
US4544418A (en) * 1984-04-16 1985-10-01 Gibbons James F Process for high temperature surface reactions in semiconductor material
US4566913A (en) * 1984-07-30 1986-01-28 International Business Machines Corporation Rapid thermal annealing of silicon dioxide for reduced electron trapping
US4585492A (en) * 1984-07-30 1986-04-29 International Business Machines Corporation Rapid thermal annealing of silicon dioxide for reduced hole trapping
US4604304A (en) * 1985-07-03 1986-08-05 Rca Corporation Process of producing thick layers of silicon dioxide

Also Published As

Publication number Publication date
DE3786046T2 (de) 1993-09-09
CA1297764C (en) 1992-03-24
WO1987005152A1 (en) 1987-08-27
JPS63502470A (ja) 1988-09-14
EP0258394A1 (de) 1988-03-09
EP0258394B1 (de) 1993-06-02
KR910002433B1 (ko) 1991-04-22
JPH0691080B2 (ja) 1994-11-14
US4814291A (en) 1989-03-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: BLUMBACH, KRAMER & PARTNER, 65193 WIESBADEN

8339 Ceased/non-payment of the annual fee