DE3773755D1 - Einrichtung zur stabilisierung des taktes der erscheinung von impulsen. - Google Patents

Einrichtung zur stabilisierung des taktes der erscheinung von impulsen.

Info

Publication number
DE3773755D1
DE3773755D1 DE8787108623T DE3773755T DE3773755D1 DE 3773755 D1 DE3773755 D1 DE 3773755D1 DE 8787108623 T DE8787108623 T DE 8787108623T DE 3773755 T DE3773755 T DE 3773755T DE 3773755 D1 DE3773755 D1 DE 3773755D1
Authority
DE
Germany
Prior art keywords
impulses
stabilizing
clock
appearance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787108623T
Other languages
English (en)
Inventor
Philippe Paul
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel CIT SA
Original Assignee
Alcatel CIT SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel CIT SA filed Critical Alcatel CIT SA
Application granted granted Critical
Publication of DE3773755D1 publication Critical patent/DE3773755D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
DE8787108623T 1986-06-19 1987-06-16 Einrichtung zur stabilisierung des taktes der erscheinung von impulsen. Expired - Fee Related DE3773755D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8608859A FR2600471B1 (fr) 1986-06-19 1986-06-19 Dispositif de stabilisation du rythme d'apparition d'impulsions

Publications (1)

Publication Number Publication Date
DE3773755D1 true DE3773755D1 (de) 1991-11-21

Family

ID=9336482

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787108623T Expired - Fee Related DE3773755D1 (de) 1986-06-19 1987-06-16 Einrichtung zur stabilisierung des taktes der erscheinung von impulsen.

Country Status (6)

Country Link
US (1) US4780895A (de)
EP (1) EP0249929B1 (de)
JP (1) JPS6313445A (de)
CA (1) CA1271535A (de)
DE (1) DE3773755D1 (de)
FR (1) FR2600471B1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2626687B1 (fr) * 1988-02-02 1990-05-25 Commissariat Energie Atomique Comparateur numerique, ratiometre numerique et analyseur d'amplitude comportant de tels ratiometres
JP2513276B2 (ja) * 1988-06-10 1996-07-03 日本電気株式会社 位相同期ル―プ
US5060244A (en) * 1989-07-28 1991-10-22 Texas Instruments Incorporated Method and apparatus for indicating when the total in a counter reaches a given number
US5045801A (en) * 1990-05-29 1991-09-03 The United States Of America As Represented By The Secretary Of The Air Force Metastable tolerant asynchronous interface
US5164969A (en) * 1991-07-12 1992-11-17 Hewlett-Packard Company Programmable max/min counter for performance analysis of computer systems
US5381454A (en) * 1993-09-20 1995-01-10 Motorola, Inc. Circuit and method of resetting a data compressor/decompressor
US5528183A (en) * 1994-02-04 1996-06-18 Lsi Logic Corporation Serial clock synchronization circuit
US5657361A (en) * 1994-09-06 1997-08-12 Fujitsu Limited Variant frequency detector circuit
CN111443326B (zh) * 2020-04-10 2022-08-19 国网浙江省电力有限公司营销服务中心 电能表自动化检定流水线运行节拍诊断系统及其工作方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL122610C (de) * 1959-02-18
US3720910A (en) * 1970-02-25 1973-03-13 Century Geophysical Corp High resolution telemetry for random pulse outputs
US4089060A (en) * 1976-10-15 1978-05-09 Mitchell Donald K Digital logarithmic apparatus
US4345211A (en) * 1980-09-15 1982-08-17 Rockwell International Corporation Digital phaselock demodulator
DE3321530A1 (de) * 1983-06-15 1984-12-20 Diehl Gmbh & Co Verfahren zur erzeugung von steuersignalen in einer vorgebbaren phasenlage, schaltungsanordnung zur durchfuehrung des verfahrens und verwendung der schaltungsanordnung
US4628269A (en) * 1984-05-23 1986-12-09 Motorola, Inc. Pulse detector for missing or extra pulses
US4639680A (en) * 1985-04-12 1987-01-27 Sperry Corporation Digital phase and frequency detector

Also Published As

Publication number Publication date
CA1271535A (fr) 1990-07-10
US4780895A (en) 1988-10-25
EP0249929B1 (de) 1991-10-16
FR2600471A1 (fr) 1987-12-24
FR2600471B1 (fr) 1988-08-26
EP0249929A1 (de) 1987-12-23
JPS6313445A (ja) 1988-01-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee