DE3767582D1 - Verfahren zur entfernung von photolack. - Google Patents

Verfahren zur entfernung von photolack.

Info

Publication number
DE3767582D1
DE3767582D1 DE8787304393T DE3767582T DE3767582D1 DE 3767582 D1 DE3767582 D1 DE 3767582D1 DE 8787304393 T DE8787304393 T DE 8787304393T DE 3767582 T DE3767582 T DE 3767582T DE 3767582 D1 DE3767582 D1 DE 3767582D1
Authority
DE
Germany
Prior art keywords
removing photo
photo paint
paint
photo
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787304393T
Other languages
English (en)
Inventor
Shuzo Fujimura
Yoshikazu Kato
Syouzi Mochizuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3767582D1 publication Critical patent/DE3767582D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/42—Stripping or agents therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
DE8787304393T 1986-05-20 1987-05-18 Verfahren zur entfernung von photolack. Expired - Fee Related DE3767582D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61113602A JPS62271435A (ja) 1986-05-20 1986-05-20 レジストの剥離方法

Publications (1)

Publication Number Publication Date
DE3767582D1 true DE3767582D1 (de) 1991-02-28

Family

ID=14616372

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787304393T Expired - Fee Related DE3767582D1 (de) 1986-05-20 1987-05-18 Verfahren zur entfernung von photolack.

Country Status (5)

Country Link
US (1) US4789427A (de)
EP (1) EP0250092B1 (de)
JP (1) JPS62271435A (de)
KR (1) KR900004055B1 (de)
DE (1) DE3767582D1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07105381B2 (ja) * 1986-09-11 1995-11-13 東京エレクトロン株式会社 アツシング装置
JPS6415934A (en) * 1987-07-10 1989-01-19 Nec Corp Manufacture of semiconductor device
JPH0770524B2 (ja) * 1987-08-19 1995-07-31 富士通株式会社 半導体装置の製造方法
JPH0777211B2 (ja) * 1987-08-19 1995-08-16 富士通株式会社 アッシング方法
US5316616A (en) * 1988-02-09 1994-05-31 Fujitsu Limited Dry etching with hydrogen bromide or bromine
EP0328350B1 (de) * 1988-02-09 1999-04-28 Fujitsu Limited Trockenätzen mit Wasserstoffbromid oder Brom
JP2541851B2 (ja) * 1989-03-10 1996-10-09 富士通株式会社 有機物の剥離方法
JPH03177021A (ja) * 1989-12-05 1991-08-01 Fujitsu Ltd 半導体装置の製造方法
JPH0443643A (ja) * 1990-06-11 1992-02-13 Fujitsu Ltd 半導体装置の製造方法
JP3391410B2 (ja) * 1993-09-17 2003-03-31 富士通株式会社 レジストマスクの除去方法
US5773367A (en) * 1996-09-06 1998-06-30 Integrated Device Technology, Inc. High throughput planarization etch process for interlayer oxide films between metals and pre-metals
US6231775B1 (en) 1998-01-28 2001-05-15 Anon, Inc. Process for ashing organic materials from substrates
US6375859B1 (en) * 1999-02-04 2002-04-23 International Business Machines Corporation Process for resist clean up of metal structures on polyimide
US20020170897A1 (en) * 2001-05-21 2002-11-21 Hall Frank L. Methods for preparing ball grid array substrates via use of a laser
US6740594B2 (en) 2001-05-31 2004-05-25 Infineon Technologies Ag Method for removing carbon-containing polysilane from a semiconductor without stripping
US10078266B2 (en) * 2016-02-26 2018-09-18 Mattson Technology, Inc. Implanted photoresist stripping process

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1399163A (en) * 1972-11-08 1975-06-25 Ferranti Ltd Methods of manufacturing semiconductor devices
US4028155A (en) * 1974-02-28 1977-06-07 Lfe Corporation Process and material for manufacturing thin film integrated circuits
US3920483A (en) * 1974-11-25 1975-11-18 Ibm Method of ion implantation through a photoresist mask
JPS5467778A (en) * 1977-11-10 1979-05-31 Toshiba Corp Production of semiconductor device
US4349409A (en) * 1980-05-12 1982-09-14 Fujitsu Limited Method and apparatus for plasma etching
US4477310A (en) * 1983-08-12 1984-10-16 Tektronix, Inc. Process for manufacturing MOS integrated circuit with improved method of forming refractory metal silicide areas
JPH0691049B2 (ja) * 1986-02-28 1994-11-14 東京応化工業株式会社 有機膜の除去方法及び装置

Also Published As

Publication number Publication date
KR870011689A (ko) 1987-12-26
EP0250092B1 (de) 1991-01-23
KR900004055B1 (ko) 1990-06-09
US4789427A (en) 1988-12-06
EP0250092A1 (de) 1987-12-23
JPS62271435A (ja) 1987-11-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee