DE3689390D1 - Verarbeitungsschaltung, fähig zum Erhöhen des Akkumulationsdurchsatzes. - Google Patents

Verarbeitungsschaltung, fähig zum Erhöhen des Akkumulationsdurchsatzes.

Info

Publication number
DE3689390D1
DE3689390D1 DE86109291T DE3689390T DE3689390D1 DE 3689390 D1 DE3689390 D1 DE 3689390D1 DE 86109291 T DE86109291 T DE 86109291T DE 3689390 T DE3689390 T DE 3689390T DE 3689390 D1 DE3689390 D1 DE 3689390D1
Authority
DE
Germany
Prior art keywords
increasing
processing circuit
circuit capable
throughput
accumulation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE86109291T
Other languages
English (en)
Inventor
Takao Nishitani
Ichiro Kuroda
Hideo Tanaka
Kyosuke Sugishita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3689390D1 publication Critical patent/DE3689390D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905—Exception handling
    • G06F7/4991—Overflow or underflow
    • G06F7/49921—Saturation, i.e. clipping the result to a minimum or maximum value

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Data Mining & Analysis (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • Complex Calculations (AREA)
DE86109291T 1985-07-09 1986-07-08 Verarbeitungsschaltung, fähig zum Erhöhen des Akkumulationsdurchsatzes. Expired - Lifetime DE3689390D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60152019A JPS6211933A (ja) 1985-07-09 1985-07-09 演算回路

Publications (1)

Publication Number Publication Date
DE3689390D1 true DE3689390D1 (de) 1994-01-27

Family

ID=15531279

Family Applications (1)

Application Number Title Priority Date Filing Date
DE86109291T Expired - Lifetime DE3689390D1 (de) 1985-07-09 1986-07-08 Verarbeitungsschaltung, fähig zum Erhöhen des Akkumulationsdurchsatzes.

Country Status (4)

Country Link
US (1) US4817047A (de)
EP (1) EP0209049B1 (de)
JP (1) JPS6211933A (de)
DE (1) DE3689390D1 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2508784B2 (ja) * 1988-02-17 1996-06-19 日本電気株式会社 指数関数演算装置
JP2600293B2 (ja) * 1988-06-10 1997-04-16 日本電気株式会社 オーバーフロー補正回路
JPH07109976B2 (ja) * 1989-02-23 1995-11-22 エルエスアイ・ロジック株式会社 ディジタルフィルタを用いた演算装置
US5031135A (en) * 1989-05-19 1991-07-09 Hitachi Micro Systems, Inc. Device for multi-precision and block arithmetic support in digital processors
JPH0797313B2 (ja) * 1989-08-30 1995-10-18 株式会社東芝 計算機及びこの計算機に用いられる演算方法
US5038314A (en) * 1989-11-17 1991-08-06 Digital Equipment Corporation Method and apparatus for correction of underflow and overflow
US5231600A (en) * 1990-04-19 1993-07-27 Bull Hn Information Systems Inc. Overflow detector for anticipating producing invalid operands resulting from performing shift operations on such operands
US5177698A (en) * 1990-07-09 1993-01-05 Eastman Kodak Company Selectable power of two coefficient signal combining circuit
US5164914A (en) * 1991-01-03 1992-11-17 Hewlett-Packard Company Fast overflow and underflow limiting circuit for signed adder
US5218564A (en) * 1991-06-07 1993-06-08 National Semiconductor Corporation Layout efficient 32-bit shifter/register with 16-bit interface
JPH0612229A (ja) * 1992-06-10 1994-01-21 Nec Corp 乗累算回路
EP0593073A1 (de) * 1992-10-16 1994-04-20 Matsushita Electric Industrial Co., Ltd. Prozessor mit Schieberegistern
JP3487903B2 (ja) * 1993-11-12 2004-01-19 松下電器産業株式会社 演算装置及び演算方法
JP2591463B2 (ja) * 1993-12-27 1997-03-19 日本電気株式会社 リミッタ装置
US5517436A (en) * 1994-06-07 1996-05-14 Andreas; David C. Digital signal processor for audio applications
US5576982A (en) * 1994-10-17 1996-11-19 Unisys Corporation Fast significant bit calculator and its application to integer multiplication and division
KR100212139B1 (ko) * 1996-07-22 1999-08-02 윤종용 클럭공급장치
US7689637B1 (en) * 2000-05-04 2010-03-30 Koninklijke Philips Electronics N.V. Adaptive filtering method and related device
JP2002063151A (ja) * 2000-08-22 2002-02-28 Mitsubishi Electric Corp マイクロコンピュータ
JP3833884B2 (ja) * 2000-09-27 2006-10-18 株式会社東芝 ディジタルフィルタ
EP1387259B1 (de) * 2002-07-31 2017-09-20 Texas Instruments Incorporated Zwischen-Prozessor Steuerung
US20040167954A1 (en) * 2003-02-21 2004-08-26 Infineon Technologies North America Corp. Overflow detection system for multiplication
US20080046497A1 (en) * 2006-08-18 2008-02-21 Conexant Systems, Inc. Systems and Methods for Implementing a Double Precision Arithmetic Memory Architecture
US8316071B2 (en) * 2009-05-27 2012-11-20 Advanced Micro Devices, Inc. Arithmetic processing unit that performs multiply and multiply-add operations with saturation and method therefor
US10067744B2 (en) * 2016-12-08 2018-09-04 International Business Machines Corporation Overflow detection for sign-magnitude adders
EP3835938A1 (de) * 2019-12-11 2021-06-16 Unify Patente GmbH & Co. KG Computerimplementiertes verfahren zur ausführung einer arithmetischen oder logischen operation in kombination mit einer akkumulationsoperation und prozessor

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4025771A (en) * 1974-03-25 1977-05-24 Hughes Aircraft Company Pipe line high speed signal processor
JPS5776634A (en) * 1980-10-31 1982-05-13 Hitachi Ltd Digital signal processor
JPS6027024A (ja) * 1983-07-22 1985-02-12 Matsushita Electric Ind Co Ltd 演算装置
JPS6033629A (ja) * 1983-08-04 1985-02-21 Nec Corp 演算装置
JPS6054070A (ja) * 1983-09-02 1985-03-28 Nec Corp 演算装置
JPH061438B2 (ja) * 1984-04-26 1994-01-05 日本電気株式会社 倍精度乗算器
JPS60247781A (ja) * 1984-05-23 1985-12-07 Matsushita Electric Ind Co Ltd 演算装置
EP0197945A1 (de) * 1984-09-28 1986-10-22 Motorola, Inc. Digitaler signalverarbeiter für einzelcyclusmultiplizierer (akkumulation)
CA1244955A (en) * 1985-05-17 1988-11-15 Yuichi Kawakami Processing circuit capable of raising throughput of accumulation
JP2912503B2 (ja) * 1992-07-30 1999-06-28 沖電気工業株式会社 トーキ録音同時モニタ方式

Also Published As

Publication number Publication date
JPS6211933A (ja) 1987-01-20
EP0209049B1 (de) 1993-12-15
EP0209049A3 (en) 1990-02-28
EP0209049A2 (de) 1987-01-21
US4817047A (en) 1989-03-28

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Legal Events

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