DE3687426D1 - Mehrprozessorsystem-architektur. - Google Patents

Mehrprozessorsystem-architektur.

Info

Publication number
DE3687426D1
DE3687426D1 DE8686105844T DE3687426T DE3687426D1 DE 3687426 D1 DE3687426 D1 DE 3687426D1 DE 8686105844 T DE8686105844 T DE 8686105844T DE 3687426 T DE3687426 T DE 3687426T DE 3687426 D1 DE3687426 D1 DE 3687426D1
Authority
DE
Germany
Prior art keywords
system architecture
processor system
processor
architecture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686105844T
Other languages
English (en)
Other versions
DE3687426T2 (de
Inventor
Claudio Fiacconi
Antonio Franzosi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull HN Information Systems Italia SpA, Bull HN Information Systems Inc filed Critical Bull HN Information Systems Italia SpA
Publication of DE3687426D1 publication Critical patent/DE3687426D1/de
Application granted granted Critical
Publication of DE3687426T2 publication Critical patent/DE3687426T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Computer And Data Communications (AREA)
DE8686105844T 1985-05-07 1986-04-28 Mehrprozessorsystem-architektur. Expired - Fee Related DE3687426T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT20599/85A IT1184553B (it) 1985-05-07 1985-05-07 Architettura di sistema a piu' processori

Publications (2)

Publication Number Publication Date
DE3687426D1 true DE3687426D1 (de) 1993-02-18
DE3687426T2 DE3687426T2 (de) 1993-07-29

Family

ID=11169369

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686105844T Expired - Fee Related DE3687426T2 (de) 1985-05-07 1986-04-28 Mehrprozessorsystem-architektur.

Country Status (7)

Country Link
US (1) US4862354A (de)
EP (1) EP0201020B1 (de)
JP (1) JPS61286961A (de)
KR (1) KR920006616B1 (de)
CA (1) CA1254663A (de)
DE (1) DE3687426T2 (de)
IT (1) IT1184553B (de)

Families Citing this family (77)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU597980B2 (en) * 1986-05-30 1990-06-14 Honeywell Bull Inc. Apparatus and method for interprocessor communication
US5142683A (en) * 1987-03-09 1992-08-25 Unisys Corporation Intercomputer communication control apparatus and method
JPS63284660A (ja) * 1987-05-16 1988-11-21 Nec Corp プロセッサ間通信方式
US5280589A (en) * 1987-07-30 1994-01-18 Kabushiki Kaisha Toshiba Memory access control system for use with a relatively small size data processing system
US5136718A (en) * 1987-09-04 1992-08-04 Digital Equipment Corporation Communications arrangement for digital data processing system employing heterogeneous multiple processing nodes
US5367688A (en) * 1987-09-04 1994-11-22 Digital Equipment Corporation Boot system for distributed digital data processing system
US4969090A (en) * 1987-09-11 1990-11-06 Beehive International Program routine vectoring circuit for selectively using either stored interupt instructions or incoming interupt handling instructions
JPH02128267A (ja) * 1988-11-09 1990-05-16 Fujitsu Ltd 共有メモリによる通信方式
EP0376003A3 (de) * 1988-12-29 1991-12-18 International Business Machines Corporation Mehrrechnersystem mit Zwischenprozessor-Datenkommunikationseinrichtungen
US5210828A (en) * 1988-12-29 1993-05-11 International Business Machines Corporation Multiprocessing system with interprocessor communications facility
EP0429780B1 (de) * 1989-11-29 1997-11-12 Kabushiki Kaisha Toshiba Zum Anschluss einer Erweiterungseinheit geeignetes Rechnersystem
EP0443876A3 (en) * 1990-02-23 1992-01-02 Kabushiki Kaisha Toshiba Computer system capable of connecting expansion unit
US5491799A (en) * 1992-01-02 1996-02-13 Amdahl Corporation Communication interface for uniform communication among hardware and software units of a computer system
US6343363B1 (en) 1994-09-22 2002-01-29 National Semiconductor Corporation Method of invoking a low power mode in a computer system using a halt instruction
US5581770A (en) * 1992-06-04 1996-12-03 Mitsubishi Denki Kabushiki Kaisha Floating interruption handling system and method
EP0645026B1 (de) * 1992-06-12 1997-11-12 The Dow Chemical Company Transparente schnittstelle fur prozesssteuerungsrechner
US5613135A (en) * 1992-09-17 1997-03-18 Kabushiki Kaisha Toshiba Portable computer having dedicated register group and peripheral controller bus between system bus and peripheral controller
JPH06214969A (ja) * 1992-09-30 1994-08-05 Internatl Business Mach Corp <Ibm> 情報通信方法および装置
DE69316559T2 (de) * 1992-12-03 1998-09-10 Advanced Micro Devices Inc Servoregelkreissteuerung
US5574862A (en) * 1993-04-14 1996-11-12 Radius Inc. Multiprocessing system with distributed input/output management
EP0640929A3 (de) * 1993-08-30 1995-11-29 Advanced Micro Devices Inc Zwischenprozessorkommunikation durch RAM-Postamt.
JPH07105023A (ja) * 1993-09-20 1995-04-21 Internatl Business Mach Corp <Ibm> データ処理システム内でスプリアス割込みを検出するための方法及び装置
CA2123447C (en) * 1993-09-20 1999-02-16 Richard L. Arndt Scalable system interrupt structure for a multiprocessing system
US5673415A (en) * 1993-12-03 1997-09-30 Unisys Corporation High speed two-port interface unit where read commands suspend partially executed write commands
US5680624A (en) * 1993-12-21 1997-10-21 Object Licensing Corporation Object oriented interrupt system
US5555430A (en) * 1994-05-31 1996-09-10 Advanced Micro Devices Interrupt control architecture for symmetrical multiprocessing system
US5574863A (en) * 1994-10-25 1996-11-12 Hewlett-Packard Company System for using mirrored memory as a robust communication path between dual disk storage controllers
GB9505724D0 (en) * 1995-03-21 1995-05-10 Newbridge Networks Corp ATM without traffic shaping
GB2308902B (en) * 1996-01-04 2000-03-29 Motorola Inc Peripheral module and microprocessor system
EP0813710B1 (de) * 1996-01-09 2001-08-22 Koninklijke Philips Electronics N.V. Verfahren und system zum synchronisieren von gleichzeitigen sequentiellen prozessen mit hilfe von intra-prozess-korrigier- und inter-prozess-adaptier- operationen
US5778236A (en) * 1996-05-17 1998-07-07 Advanced Micro Devices, Inc. Multiprocessing interrupt controller on I/O bus
US6151638A (en) * 1997-06-25 2000-11-21 Unisys Corp. System and method for performing external procedure calls from a client program to a server program to a server program and back to the client program while both are running in a heterogenous computer
US6141697A (en) * 1997-06-25 2000-10-31 Unisys Corp. System and method for performing external procedure calls in heterogeneous computer systems utilizing program stacks
US6192418B1 (en) * 1997-06-25 2001-02-20 Unisys Corp. System and method for performing external procedure calls from a client program to a server program while both are operating in a heterogenous computer
US6289391B1 (en) * 1997-06-25 2001-09-11 Unisys Corp. System and method for performing external procedure calls from a server program to a client program while both are running in a heterogeneous computer
US6131113A (en) * 1998-02-24 2000-10-10 International Business Machines Corporation Managing a shared resource in a multi-processor system
US7233977B2 (en) * 1998-12-18 2007-06-19 Emc Corporation Messaging mechanism employing mailboxes for inter processor communications
US6295573B1 (en) 1999-02-16 2001-09-25 Advanced Micro Devices, Inc. Point-to-point interrupt messaging within a multiprocessing computer system
US6205508B1 (en) 1999-02-16 2001-03-20 Advanced Micro Devices, Inc. Method for distributing interrupts in a multi-processor system
US6442597B1 (en) 1999-07-08 2002-08-27 International Business Machines Corporation Providing global coherence in SMP systems using response combination block coupled to address switch connecting node controllers to memory
US6779036B1 (en) 1999-07-08 2004-08-17 International Business Machines Corporation Method and apparatus for achieving correct order among bus memory transactions in a physically distributed SMP system
US6467012B1 (en) 1999-07-08 2002-10-15 International Business Machines Corporation Method and apparatus using a distributed system structure to support bus-based cache-coherence protocols for symmetric multiprocessors
US6389526B1 (en) 1999-08-24 2002-05-14 Advanced Micro Devices, Inc. Circuit and method for selectively stalling interrupt requests initiated by devices coupled to a multiprocessor system
US6591348B1 (en) 1999-09-09 2003-07-08 International Business Machines Corporation Method and system for resolution of transaction collisions to achieve global coherence in a distributed symmetric multiprocessor system
US6725307B1 (en) 1999-09-23 2004-04-20 International Business Machines Corporation Method and system for controlling data transfers with physical separation of data functionality from address and control functionality in a distributed multi-bus multiprocessor system
US6587930B1 (en) 1999-09-23 2003-07-01 International Business Machines Corporation Method and system for implementing remstat protocol under inclusion and non-inclusion of L1 data in L2 cache to prevent read-read deadlock
US6457085B1 (en) 1999-11-04 2002-09-24 International Business Machines Corporation Method and system for data bus latency reduction using transfer size prediction for split bus designs
US7529799B2 (en) 1999-11-08 2009-05-05 International Business Machines Corporation Method and apparatus for transaction tag assignment and maintenance in a distributed symmetric multiprocessor system
US6529990B1 (en) 1999-11-08 2003-03-04 International Business Machines Corporation Method and apparatus to eliminate failed snoops of transactions caused by bus timing conflicts in a distributed symmetric multiprocessor system
US6523076B1 (en) 1999-11-08 2003-02-18 International Business Machines Corporation Method and apparatus for synchronizing multiple bus arbiters on separate chips to give simultaneous grants for the purpose of breaking livelocks
US6542949B1 (en) 1999-11-08 2003-04-01 International Business Machines Corporation Method and apparatus for increased performance of a parked data bus in the non-parked direction
US6516379B1 (en) 1999-11-08 2003-02-04 International Business Machines Corporation Method and apparatus for transaction pacing to reduce destructive interference between successive transactions in a distributed symmetric multiprocessor system
US6535941B1 (en) 1999-11-08 2003-03-18 International Business Machines Corporation Method and apparatus for avoiding data bus grant starvation in a non-fair, prioritized arbiter for a split bus system with independent address and data bus grants
US6684279B1 (en) 1999-11-08 2004-01-27 International Business Machines Corporation Method, apparatus, and computer program product for controlling data transfer
US6606676B1 (en) 1999-11-08 2003-08-12 International Business Machines Corporation Method and apparatus to distribute interrupts to multiple interrupt handlers in a distributed symmetric multiprocessor system
US6606677B1 (en) * 2000-03-07 2003-08-12 International Business Machines Corporation High speed interrupt controller
FR2817058B1 (fr) * 2000-11-21 2003-01-24 St Microelectronics Sa Dispositif et procede de traitement des interruptions dans une transmission d'informations sur un bus
US7233998B2 (en) * 2001-03-22 2007-06-19 Sony Computer Entertainment Inc. Computer architecture and software cells for broadband networks
US20050071828A1 (en) * 2003-09-25 2005-03-31 International Business Machines Corporation System and method for compiling source code for multi-processor environments
US7475257B2 (en) 2003-09-25 2009-01-06 International Business Machines Corporation System and method for selecting and using a signal processor in a multiprocessor system to operate as a security for encryption/decryption of data
US7444632B2 (en) * 2003-09-25 2008-10-28 International Business Machines Corporation Balancing computational load across a plurality of processors
US7496917B2 (en) * 2003-09-25 2009-02-24 International Business Machines Corporation Virtual devices using a pluarlity of processors
US7389508B2 (en) * 2003-09-25 2008-06-17 International Business Machines Corporation System and method for grouping processors and assigning shared memory space to a group in heterogeneous computer environment
US7318218B2 (en) 2003-09-25 2008-01-08 International Business Machines Corporation System and method for processor thread for software debugging
US7549145B2 (en) * 2003-09-25 2009-06-16 International Business Machines Corporation Processor dedicated code handling in a multi-processor environment
US7523157B2 (en) * 2003-09-25 2009-04-21 International Business Machines Corporation Managing a plurality of processors as devices
US7478390B2 (en) * 2003-09-25 2009-01-13 International Business Machines Corporation Task queue management of virtual devices using a plurality of processors
US7415703B2 (en) * 2003-09-25 2008-08-19 International Business Machines Corporation Loading software on a plurality of processors
US7516456B2 (en) * 2003-09-25 2009-04-07 International Business Machines Corporation Asymmetric heterogeneous multi-threaded operating system
US8555395B2 (en) * 2004-02-03 2013-10-08 Media Rights Technologies, Inc. Method and system for providing a media change notification on a computing system
US8510491B1 (en) * 2005-04-05 2013-08-13 Oracle America, Inc. Method and apparatus for efficient interrupt event notification for a scalable input/output device
US7831778B2 (en) * 2006-03-30 2010-11-09 Silicon Image, Inc. Shared nonvolatile memory architecture
TWI386846B (zh) * 2006-03-30 2013-02-21 Silicon Image Inc 利用共享式非揮發性記憶體初始化多個處理元件之方法、系統及快閃記憶體元件
US8677034B2 (en) * 2006-04-28 2014-03-18 Hewlett-Packard Development Company, L.P. System for controlling I/O devices in a multi-partition computer system
DE102007063291A1 (de) * 2007-12-27 2009-07-02 Robert Bosch Gmbh Sicherheitssteuerung
US10684965B2 (en) 2017-11-08 2020-06-16 Advanced Micro Devices, Inc. Method to reduce write responses to improve bandwidth and efficiency
TWI703501B (zh) * 2018-08-23 2020-09-01 慧榮科技股份有限公司 具有分散式信箱架構的多處理器系統及其溝通方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3483520A (en) * 1966-04-20 1969-12-09 Gen Electric Apparatus providing inter-processor communication in a multicomputer system
US3940743A (en) * 1973-11-05 1976-02-24 Digital Equipment Corporation Interconnecting unit for independently operable data processing systems
US4038644A (en) * 1975-11-19 1977-07-26 Ncr Corporation Destination selection apparatus for a bus oriented computer system
US4402046A (en) * 1978-12-21 1983-08-30 Intel Corporation Interprocessor communication system
IT1126475B (it) * 1979-12-03 1986-05-21 Honeywell Inf Systems Apparato di comunicazione tra piu' processori
US4420806A (en) * 1981-01-15 1983-12-13 Harris Corporation Interrupt coupling and monitoring system
US4449182A (en) * 1981-10-05 1984-05-15 Digital Equipment Corporation Interface between a pair of processors, such as host and peripheral-controlling processors in data processing systems
US4543627A (en) * 1981-12-14 1985-09-24 At&T Bell Laboratories Internal communication arrangement for a multiprocessor system
US4590556A (en) * 1983-01-17 1986-05-20 Tandy Corporation Co-processor combination
JPS59218560A (ja) * 1983-05-26 1984-12-08 Fuji Electric Co Ltd 割込コントロ−ル方式

Also Published As

Publication number Publication date
KR860009352A (ko) 1986-12-22
EP0201020A3 (en) 1989-06-14
US4862354A (en) 1989-08-29
EP0201020B1 (de) 1993-01-07
KR920006616B1 (ko) 1992-08-10
CA1254663A (en) 1989-05-23
JPS61286961A (ja) 1986-12-17
DE3687426T2 (de) 1993-07-29
EP0201020A2 (de) 1986-12-17
IT1184553B (it) 1987-10-28
IT8520599A0 (it) 1985-05-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee