DE3681045D1 - Vorladungsschaltung. - Google Patents
Vorladungsschaltung.Info
- Publication number
- DE3681045D1 DE3681045D1 DE8686300217T DE3681045T DE3681045D1 DE 3681045 D1 DE3681045 D1 DE 3681045D1 DE 8686300217 T DE8686300217 T DE 8686300217T DE 3681045 T DE3681045 T DE 3681045T DE 3681045 D1 DE3681045 D1 DE 3681045D1
- Authority
- DE
- Germany
- Prior art keywords
- charge circuit
- charge
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Static Random-Access Memory (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/696,624 US4638462A (en) | 1985-01-31 | 1985-01-31 | Self-timed precharge circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3681045D1 true DE3681045D1 (de) | 1991-10-02 |
Family
ID=24797871
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8686300217T Expired - Fee Related DE3681045D1 (de) | 1985-01-31 | 1986-01-15 | Vorladungsschaltung. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4638462A (de) |
EP (1) | EP0190823B1 (de) |
JP (1) | JPS61175995A (de) |
CA (1) | CA1230422A (de) |
DE (1) | DE3681045D1 (de) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4926384A (en) * | 1988-01-25 | 1990-05-15 | Visic, Incorporated | Static ram with write recovery in selected portion of memory array |
US4878198A (en) * | 1988-01-25 | 1989-10-31 | Visic, Incorporated | Static ram with common data line equalization |
US5404327A (en) * | 1988-06-30 | 1995-04-04 | Texas Instruments Incorporated | Memory device with end of cycle precharge utilizing write signal and data transition detectors |
US4962326B1 (en) * | 1988-07-22 | 1993-11-16 | Micron Technology, Inc. | Reduced latchup in precharging i/o lines to sense amp signal levels |
WO1990007777A1 (en) * | 1988-12-24 | 1990-07-12 | Alcatel N.V. | Asynchronous timing circuit for a 2-coordinate memory |
US5018106A (en) * | 1989-04-27 | 1991-05-21 | Vlsi Technology, Inc. | Static random access memory with modulated loads |
CA1298359C (en) * | 1989-08-28 | 1992-03-31 | Marc P. Roy | High-speed dynamic cmos circuit |
JP2646032B2 (ja) * | 1989-10-14 | 1997-08-25 | 三菱電機株式会社 | Lifo方式の半導体記憶装置およびその制御方法 |
US5301165A (en) * | 1992-10-28 | 1994-04-05 | International Business Machines Corporation | Chip select speedup circuit for a memory |
US5432747A (en) * | 1994-09-14 | 1995-07-11 | Unisys Corporation | Self-timing clock generator for precharged synchronous SRAM |
US5740094A (en) * | 1995-08-21 | 1998-04-14 | International Business Machines Corporation | Self-timed multiplier array |
US5835410A (en) * | 1997-06-09 | 1998-11-10 | Microchip Technology Incorporated | Self timed precharge sense amplifier for a memory array |
US6072738A (en) * | 1998-03-09 | 2000-06-06 | Lsi Logic Corporation | Cycle time reduction using an early precharge |
US6072746A (en) * | 1998-08-14 | 2000-06-06 | International Business Machines Corporation | Self-timed address decoder for register file and compare circuit of a multi-port CAM |
US6363336B1 (en) * | 1999-10-13 | 2002-03-26 | Transmeta Corporation | Fine grain translation discrimination |
DE10025569A1 (de) * | 2000-05-24 | 2001-12-13 | Infineon Technologies Ag | Integrierter Speicher mit Zeilenzugriffssteuerung zur Aktivierung und Vorladung von Zeilenleitungen und Verfahren zum Betrieb eines solchen Speichers |
DE102007005930A1 (de) | 2007-02-06 | 2008-08-07 | Efficient Energy Gmbh | Wärmepuppe, Kleinkraftwerk und Verfahren zum Pumpen von Wärme |
JP7086795B2 (ja) * | 2018-09-03 | 2022-06-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3909631A (en) * | 1973-08-02 | 1975-09-30 | Texas Instruments Inc | Pre-charge voltage generating system |
US3942162A (en) * | 1974-07-01 | 1976-03-02 | Motorola, Inc. | Pre-conditioning circuits for MOS integrated circuits |
US3942037A (en) * | 1974-09-06 | 1976-03-02 | Motorola, Inc. | MOS edge sensing circuit |
US4110840A (en) * | 1976-12-22 | 1978-08-29 | Motorola Inc. | Sense line charging system for random access memory |
US4208730A (en) * | 1978-08-07 | 1980-06-17 | Rca Corporation | Precharge circuit for memory array |
JPS55132595A (en) * | 1979-04-04 | 1980-10-15 | Nec Corp | Semiconductor circuit |
JPS56165983A (en) * | 1980-05-26 | 1981-12-19 | Toshiba Corp | Semiconductor storage device |
US4355377A (en) * | 1980-06-30 | 1982-10-19 | Inmos Corporation | Asynchronously equillibrated and pre-charged static ram |
JPS5740796A (en) * | 1980-08-21 | 1982-03-06 | Nec Corp | Semiconductor circuit |
US4338679A (en) * | 1980-12-24 | 1982-07-06 | Mostek Corporation | Row driver circuit for semiconductor memory |
JPS57195387A (en) * | 1981-05-27 | 1982-12-01 | Hitachi Ltd | Data lien precharging system of memory integrated circuit |
US4539661A (en) * | 1982-06-30 | 1985-09-03 | Fujitsu Limited | Static-type semiconductor memory device |
JPS6061986A (ja) * | 1983-09-14 | 1985-04-09 | Mitsubishi Electric Corp | 半導体記憶装置 |
JPH0789437B2 (ja) * | 1985-01-23 | 1995-09-27 | 株式会社日立製作所 | 半導体記憶装置 |
JPS61144788A (ja) * | 1984-12-18 | 1986-07-02 | Nec Corp | 半導体記憶装置 |
-
1985
- 1985-01-31 US US06/696,624 patent/US4638462A/en not_active Expired - Fee Related
- 1985-06-25 CA CA000485180A patent/CA1230422A/en not_active Expired
- 1985-09-13 JP JP60201902A patent/JPS61175995A/ja active Granted
-
1986
- 1986-01-15 EP EP86300217A patent/EP0190823B1/de not_active Expired
- 1986-01-15 DE DE8686300217T patent/DE3681045D1/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CA1230422A (en) | 1987-12-15 |
EP0190823A2 (de) | 1986-08-13 |
US4638462A (en) | 1987-01-20 |
EP0190823A3 (en) | 1989-10-25 |
EP0190823B1 (de) | 1991-08-28 |
JPH0520840B2 (de) | 1993-03-22 |
JPS61175995A (ja) | 1986-08-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |