DE3583621D1 - Elektronische schaltung geeignet zur ausfuehrung einer reihe von divisionen ohne unzulaessige fehler. - Google Patents

Elektronische schaltung geeignet zur ausfuehrung einer reihe von divisionen ohne unzulaessige fehler.

Info

Publication number
DE3583621D1
DE3583621D1 DE8585101228T DE3583621T DE3583621D1 DE 3583621 D1 DE3583621 D1 DE 3583621D1 DE 8585101228 T DE8585101228 T DE 8585101228T DE 3583621 T DE3583621 T DE 3583621T DE 3583621 D1 DE3583621 D1 DE 3583621D1
Authority
DE
Germany
Prior art keywords
divisions
executing
range
electronic circuit
circuit suitable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585101228T
Other languages
English (en)
Inventor
Takashi Kanazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3583621D1 publication Critical patent/DE3583621D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/535—Dividing only
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/4915—Multiplying; Dividing
    • G06F7/4917—Dividing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/535—Dividing only
    • G06F7/537—Reduction of the number of iteration steps or stages, e.g. using the Sweeny-Robertson-Tocher [SRT] algorithm
    • G06F7/5375—Non restoring calculation, where each digit is either negative, zero or positive, e.g. SRT

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
DE8585101228T 1984-02-07 1985-02-06 Elektronische schaltung geeignet zur ausfuehrung einer reihe von divisionen ohne unzulaessige fehler. Expired - Fee Related DE3583621D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59019502A JPS60164837A (ja) 1984-02-07 1984-02-07 除算装置

Publications (1)

Publication Number Publication Date
DE3583621D1 true DE3583621D1 (de) 1991-09-05

Family

ID=12001144

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585101228T Expired - Fee Related DE3583621D1 (de) 1984-02-07 1985-02-06 Elektronische schaltung geeignet zur ausfuehrung einer reihe von divisionen ohne unzulaessige fehler.

Country Status (4)

Country Link
US (1) US4725974A (de)
EP (1) EP0154182B1 (de)
JP (1) JPS60164837A (de)
DE (1) DE3583621D1 (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4881193A (en) * 1986-09-04 1989-11-14 Hitachi, Ltd. Rational number operation unit for reduction
US4991132A (en) * 1987-12-17 1991-02-05 Matsushita Electric Industrial Co., Ltd. Apparatus for executing division by high-speed convergence processing
JPH0833816B2 (ja) * 1988-10-08 1996-03-29 日本電気株式会社 固定小数点除算方式
DE68926289T2 (de) * 1989-01-13 1996-10-10 Ibm Gleitkommadivisions-Verfahren und -Anordnung
US5249149A (en) * 1989-01-13 1993-09-28 International Business Machines Corporation Method and apparatus for performining floating point division
US5046038A (en) * 1989-07-07 1991-09-03 Cyrix Corporation Method and apparatus for performing division using a rectangular aspect ratio multiplier
US5065352A (en) * 1989-08-16 1991-11-12 Matsushita Electric Industrial Co., Ltd. Divide apparatus employing multiplier with overlapped partial quotients
JPH0535773A (ja) * 1991-07-30 1993-02-12 Nec Corp ベクトル除算方式とその装置
EP0530936B1 (de) * 1991-09-05 2000-05-17 Cyrix Corporation Verfahren und Anordnung zur vorteilierten Division
FR2690771A1 (fr) * 1992-04-29 1993-11-05 Philips Electronique Lab Processeur neuronal muni de moyens pour normaliser des données.
US5377134A (en) * 1992-12-29 1994-12-27 International Business Machines Corporation Leading constant eliminator for extended precision in pipelined division
GB2296350B (en) * 1994-12-21 1999-10-06 Advanced Risc Mach Ltd Data processing divider
US5768170A (en) * 1996-07-25 1998-06-16 Motorola Inc. Method and apparatus for performing microprocessor integer division operations using floating point hardware
US6360241B1 (en) 1999-02-01 2002-03-19 Compaq Information Technologies Goup, L.P. Computer method and apparatus for division and square root operations using signed digit
US6732135B1 (en) * 1999-02-01 2004-05-04 Hewlett-Packard Development Company, L.P. Method and apparatus for accumulating partial quotients in a digital processor
US6941334B2 (en) * 2002-02-01 2005-09-06 Broadcom Corporation Higher precision divide and square root approximations
KR100480724B1 (ko) * 2002-10-31 2005-04-07 엘지전자 주식회사 가변 스텝사이즈 적응형 역수기
GB2582146B (en) 2019-03-11 2021-08-18 Graphcore Ltd Execution Unit for Evaluating Functions Using Newton Raphson Iterations
GB2582144B (en) * 2019-03-11 2021-03-10 Graphcore Ltd Execution Unit Comprising Processing Pipeline for Evaluating a Plurality of Types of Functions
CN113254072B (zh) * 2021-05-27 2023-04-07 上海阵量智能科技有限公司 数据处理器、数据处理方法、芯片、计算机设备及介质

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3828175A (en) * 1972-10-30 1974-08-06 Amdahl Corp Method and apparatus for division employing table-lookup and functional iteration
JPS5520508A (en) * 1978-06-29 1980-02-14 Panafacom Ltd Processor for division
JPS5741737A (en) * 1980-08-22 1982-03-09 Nec Corp Dividing device
JPS57172444A (en) * 1981-04-15 1982-10-23 Hitachi Ltd Approximate quotient correcting circuit
JPS58140846A (ja) * 1982-02-16 1983-08-20 Hitachi Ltd ２進化１０進数除算装置
JPS58213343A (ja) * 1982-06-07 1983-12-12 Nec Corp 除算装置

Also Published As

Publication number Publication date
JPH0368416B2 (de) 1991-10-28
EP0154182A3 (en) 1986-06-11
US4725974A (en) 1988-02-16
EP0154182B1 (de) 1991-07-31
EP0154182A2 (de) 1985-09-11
JPS60164837A (ja) 1985-08-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee