DE3576260D1 - Fehler entdeckendes und fehler korrigierendes system. - Google Patents

Fehler entdeckendes und fehler korrigierendes system.

Info

Publication number
DE3576260D1
DE3576260D1 DE8686900475T DE3576260T DE3576260D1 DE 3576260 D1 DE3576260 D1 DE 3576260D1 DE 8686900475 T DE8686900475 T DE 8686900475T DE 3576260 T DE3576260 T DE 3576260T DE 3576260 D1 DE3576260 D1 DE 3576260D1
Authority
DE
Germany
Prior art keywords
error
detecting
correcting system
correcting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686900475T
Other languages
English (en)
Inventor
Gene Goldsbury
Thomas Schmidt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR Voyix Corp
Original Assignee
NCR Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR Corp filed Critical NCR Corp
Application granted granted Critical
Publication of DE3576260D1 publication Critical patent/DE3576260D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/19Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/008Reliability or availability analysis

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Detection And Correction Of Errors (AREA)
DE8686900475T 1984-12-13 1985-12-10 Fehler entdeckendes und fehler korrigierendes system. Expired - Lifetime DE3576260D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/681,347 US4646312A (en) 1984-12-13 1984-12-13 Error detection and correction system
PCT/US1985/002443 WO1986003634A1 (en) 1984-12-13 1985-12-10 Error detection and correction system

Publications (1)

Publication Number Publication Date
DE3576260D1 true DE3576260D1 (de) 1990-04-05

Family

ID=24734894

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686900475T Expired - Lifetime DE3576260D1 (de) 1984-12-13 1985-12-10 Fehler entdeckendes und fehler korrigierendes system.

Country Status (6)

Country Link
US (1) US4646312A (de)
EP (1) EP0204832B1 (de)
JP (1) JPS62501047A (de)
CA (1) CA1240065A (de)
DE (1) DE3576260D1 (de)
WO (1) WO1986003634A1 (de)

Families Citing this family (37)

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Publication number Priority date Publication date Assignee Title
US4785452A (en) * 1986-04-25 1988-11-15 International Business Machines Corporation Error detection using variable field parity checking
US4761783A (en) * 1986-10-17 1988-08-02 Christensen Harold F Apparatus and method for reporting occurrences of errors in signals stored in a data processor
JPH0654476B2 (ja) * 1987-03-04 1994-07-20 日本電気株式会社 制御メモリ誤り訂正制御方式
US4856004A (en) * 1987-10-05 1989-08-08 Motorola, Inc. Microprocessor based BCH decoder
US5313601A (en) * 1988-01-30 1994-05-17 Nec Corporation Request control apparatus
US5107507A (en) * 1988-05-26 1992-04-21 International Business Machines Bidirectional buffer with latch and parity capability
US4937828A (en) * 1988-11-04 1990-06-26 Westinghouse Electric Corp. High speed parallel CRC device for concatenated data frames
US5212695A (en) * 1989-04-28 1993-05-18 Canon Kabushiki Kaisha Error check or erro correction code coding device
JPH03272224A (ja) * 1990-03-20 1991-12-03 Canon Inc 情報信号処理方法
US5392294A (en) * 1991-03-08 1995-02-21 International Business Machines Corporation Diagnostic tool and method for locating the origin of parasitic bit faults in a memory array
JPH05216698A (ja) * 1991-08-05 1993-08-27 Advanced Micro Devicds Inc 改良されたエラー検出および訂正回路
JP2568031B2 (ja) * 1992-07-17 1996-12-25 インターナショナル・ビジネス・マシーンズ・コーポレイション 誤り検出及び訂正システム
US5771247A (en) * 1994-10-03 1998-06-23 International Business Machines Corporation Low latency error reporting for high performance bus
KR19980073924A (ko) * 1997-03-20 1998-11-05 문정환 에러 데이터 수정회로
US6301680B1 (en) * 1998-09-24 2001-10-09 Sun Microsystems, Inc. Technique for correcting single-bit errors and detecting paired double-bit errors
US6279092B1 (en) * 1999-01-06 2001-08-21 International Business Machines Corporation Kernel identification for space management in compressed memory systems
FR2793902B1 (fr) * 1999-05-17 2001-08-10 Cit Alcatel Dispositif de detection d'erreur dans une memoire associee a un processeur
JP4074029B2 (ja) 1999-06-28 2008-04-09 株式会社東芝 フラッシュメモリ
US7493530B2 (en) * 2002-06-25 2009-02-17 Avago Technologies General Ip (Singapore) Pte. Ltd. Method and apparatus for detecting an error in a bit sequence
JP3558625B2 (ja) * 2002-07-01 2004-08-25 沖電気工業株式会社 同期誤り検出回路
US7278083B2 (en) * 2003-06-27 2007-10-02 International Business Machines Corporation Method and system for optimized instruction fetch to protect against soft and hard errors
US7530008B2 (en) * 2003-08-08 2009-05-05 Sun Microsystems, Inc. Scalable-chip-correct ECC scheme
US8190914B2 (en) * 2006-02-28 2012-05-29 Red Hat, Inc. Method and system for designating and handling confidential memory allocations
US7631229B2 (en) * 2006-04-24 2009-12-08 Freescale Semiconductor, Inc. Selective bit error detection at a bus device
US7506226B2 (en) * 2006-05-23 2009-03-17 Micron Technology, Inc. System and method for more efficiently using error correction codes to facilitate memory device testing
US7676729B2 (en) * 2006-08-23 2010-03-09 Sun Microsystems, Inc. Data corruption avoidance in DRAM chip sparing
JP2009087485A (ja) * 2007-10-01 2009-04-23 Elpida Memory Inc 半導体装置
US7895493B2 (en) * 2008-04-28 2011-02-22 International Business Machines Corporation Bus failure management method and system
US8140945B2 (en) * 2008-05-23 2012-03-20 Oracle America, Inc. Hard component failure detection and correction
US8255773B2 (en) * 2009-06-29 2012-08-28 Sandisk Technologies Inc. System and method of tracking error data within a storage device
US8756363B2 (en) 2011-07-07 2014-06-17 Oracle International Corporation Efficient storage of memory version data
JP2013062737A (ja) 2011-09-14 2013-04-04 Nec Corp 信号送受信回路
US9043559B2 (en) 2012-10-23 2015-05-26 Oracle International Corporation Block memory engine with memory corruption detection
US9450614B2 (en) 2013-09-13 2016-09-20 Rambus Inc. Memory module with integrated error correction
US9672298B2 (en) 2014-05-01 2017-06-06 Oracle International Corporation Precise excecution of versioned store instructions
US9195593B1 (en) 2014-09-27 2015-11-24 Oracle International Corporation Hardware assisted object memory migration
EP3661056B1 (de) * 2018-11-27 2022-05-25 STMicroelectronics Application GmbH Verarbeitungssystem, zugehörige integrierte schaltung, vorrichtung und verfahren

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3668632A (en) * 1969-02-13 1972-06-06 Ibm Fast decode character error detection and correction system
US3648239A (en) * 1970-06-30 1972-03-07 Ibm System for translating to and from single error correction-double error detection hamming code and byte parity code
US3688265A (en) * 1971-03-18 1972-08-29 Ibm Error-free decoding for failure-tolerant memories
US4037091A (en) * 1976-04-05 1977-07-19 Bell Telephone Laboratories, Incorporated Error correction circuit utilizing multiple parity bits
IT1089225B (it) * 1977-12-23 1985-06-18 Honeywell Inf Systems Memoria con dispositivo rivelatore e correttore a intervento selettivo
JPS6051749B2 (ja) * 1979-08-31 1985-11-15 富士通株式会社 エラ−訂正方式
US4336611A (en) * 1979-12-03 1982-06-22 Honeywell Information Systems Inc. Error correction apparatus and method
US4355391A (en) * 1980-03-31 1982-10-19 Texas Instruments Incorporated Apparatus and method of error detection and/or correction in a data set
US4345328A (en) * 1980-06-30 1982-08-17 Sperry Corporation ECC Check bit generation using through checking parity bits
US4388684A (en) * 1981-03-27 1983-06-14 Honeywell Information Systems Inc. Apparatus for deferring error detection of multibyte parity encoded data received from a plurality of input/output data sources
US4413339A (en) * 1981-06-24 1983-11-01 Digital Equipment Corporation Multiple error detecting and correcting system employing Reed-Solomon codes
JPS5846741A (ja) * 1981-09-11 1983-03-18 Nec Corp 復号器
US4456996A (en) * 1981-12-02 1984-06-26 Bell Telephone Laboratories, Incorporated Parallel/series error correction circuit

Also Published As

Publication number Publication date
US4646312A (en) 1987-02-24
EP0204832B1 (de) 1990-02-28
CA1240065A (en) 1988-08-02
JPS62501047A (ja) 1987-04-23
WO1986003634A1 (en) 1986-06-19
EP0204832A1 (de) 1986-12-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee