DE3483929D1 - Hochgeschwindigkeitsmultiplizierer fuer fest- und gleitkommaoperanden. - Google Patents

Hochgeschwindigkeitsmultiplizierer fuer fest- und gleitkommaoperanden.

Info

Publication number
DE3483929D1
DE3483929D1 DE8484107808T DE3483929T DE3483929D1 DE 3483929 D1 DE3483929 D1 DE 3483929D1 DE 8484107808 T DE8484107808 T DE 8484107808T DE 3483929 T DE3483929 T DE 3483929T DE 3483929 D1 DE3483929 D1 DE 3483929D1
Authority
DE
Germany
Prior art keywords
commanders
sliding
fixed
speed multiplier
multiplier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8484107808T
Other languages
English (en)
Inventor
Steven Lee George
James Lee Hefner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3483929D1 publication Critical patent/DE3483929D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G06F7/5324—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel partitioned, i.e. using repetitively a smaller parallel parallel multiplier or using an array of such smaller multipliers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G06F7/487—Multiplying; Dividing
    • G06F7/4876—Multiplying
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3812—Devices capable of handling different types of numbers
    • G06F2207/3816—Accepting numbers of variable word length
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804—Details
    • G06F2207/3808—Details concerning the type of numbers or the way they are handled
    • G06F2207/3812—Devices capable of handling different types of numbers
    • G06F2207/3824—Accepting both fixed-point and floating-point numbers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49905—Exception handling
    • G06F7/4991—Overflow or underflow
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49936—Normalisation mentioned as feature only
DE8484107808T 1983-07-21 1984-07-05 Hochgeschwindigkeitsmultiplizierer fuer fest- und gleitkommaoperanden. Expired - Fee Related DE3483929D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/515,845 US4594679A (en) 1983-07-21 1983-07-21 High speed hardware multiplier for fixed floating point operands

Publications (1)

Publication Number Publication Date
DE3483929D1 true DE3483929D1 (de) 1991-02-21

Family

ID=24052998

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484107808T Expired - Fee Related DE3483929D1 (de) 1983-07-21 1984-07-05 Hochgeschwindigkeitsmultiplizierer fuer fest- und gleitkommaoperanden.

Country Status (6)

Country Link
US (1) US4594679A (de)
EP (1) EP0132646B1 (de)
JP (1) JPS6027026A (de)
AR (1) AR241060A1 (de)
BR (1) BR8401796A (de)
DE (1) DE3483929D1 (de)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4716539A (en) * 1984-12-31 1987-12-29 Gte Communication Systems Corporation Multiplier circuit for encoder PCM samples
JPS6284335A (ja) * 1985-10-09 1987-04-17 Hitachi Ltd 乗算回路
JPH069028B2 (ja) * 1986-02-18 1994-02-02 日本電気株式会社 演算装置
US4974198A (en) * 1986-07-16 1990-11-27 Nec Corporation Vector processing system utilizing firm ware control to prevent delays during processing operations
US4991131A (en) * 1987-10-06 1991-02-05 Industrial Technology Research Institute Multiplication and accumulation device
US4893268A (en) * 1988-04-15 1990-01-09 Motorola, Inc. Circuit and method for accumulating partial products of a single, double or mixed precision multiplication
US4926371A (en) * 1988-12-28 1990-05-15 International Business Machines Corporation Two's complement multiplication with a sign magnitude multiplier
US4953119A (en) * 1989-01-27 1990-08-28 Hughes Aircraft Company Multiplier circuit with selectively interconnected pipelined multipliers for selectively multiplication of fixed and floating point numbers
JPH04205559A (ja) * 1990-11-30 1992-07-27 Nec Corp ベクトル演算装置
US5187679A (en) * 1991-06-05 1993-02-16 International Business Machines Corporation Generalized 7/3 counters
JPH0820942B2 (ja) * 1991-09-26 1996-03-04 インターナショナル・ビジネス・マシーンズ・コーポレイション 高速乗算器
US5253195A (en) * 1991-09-26 1993-10-12 International Business Machines Corporation High speed multiplier
US5200912A (en) * 1991-11-19 1993-04-06 Advanced Micro Devices, Inc. Apparatus for providing power to selected portions of a multiplying device
US5265043A (en) * 1991-12-23 1993-11-23 Motorola, Inc. Wallace tree multiplier array having an improved layout topology
US5584009A (en) * 1993-10-18 1996-12-10 Cyrix Corporation System and method of retiring store data from a write buffer
US6219773B1 (en) 1993-10-18 2001-04-17 Via-Cyrix, Inc. System and method of retiring misaligned write operands from a write buffer
US5740398A (en) * 1993-10-18 1998-04-14 Cyrix Corporation Program order sequencing of data in a microprocessor with write buffer
US5471598A (en) * 1993-10-18 1995-11-28 Cyrix Corporation Data dependency detection and handling in a microprocessor with write buffer
US5615402A (en) * 1993-10-18 1997-03-25 Cyrix Corporation Unified write buffer having information identifying whether the address belongs to a first write operand or a second write operand having an extra wide latch
JP3583474B2 (ja) * 1994-06-29 2004-11-04 株式会社ルネサステクノロジ 乗算装置
US5586070A (en) * 1994-08-03 1996-12-17 Chromatic Research, Inc. Structure and method for embedding two small multipliers in a larger multiplier
US5912832A (en) * 1996-09-12 1999-06-15 Board Of Regents, The University Of Texas System Fast n-bit by n-bit multipliers using 4-bit by 4-bit multipliers and cascaded adders
KR100425674B1 (ko) * 1996-10-11 2004-06-11 엘지전자 주식회사 디지탈신호처리기의부동소숫점형식곱셈방법
US6055554A (en) * 1998-03-04 2000-04-25 Internatinal Business Machines Corporation Floating point binary quad word format multiply instruction unit
US6021422A (en) * 1998-03-04 2000-02-01 International Business Machines Corporation Partitioning of binary quad word format multiply instruction on S/390 processor
US6341300B1 (en) 1999-01-29 2002-01-22 Sun Microsystems, Inc. Parallel fixed point square root and reciprocal square root computation unit in a processor
US6523055B1 (en) 1999-01-20 2003-02-18 Lsi Logic Corporation Circuit and method for multiplying and accumulating the sum of two products in a single cycle
US6480872B1 (en) * 1999-01-21 2002-11-12 Sandcraft, Inc. Floating-point and integer multiply-add and multiply-accumulate
US6912557B1 (en) * 2000-06-09 2005-06-28 Cirrus Logic, Inc. Math coprocessor
US6829627B2 (en) * 2001-01-18 2004-12-07 International Business Machines Corporation Floating point unit for multiple data architectures
KR100402734B1 (ko) * 2001-12-21 2003-10-22 한국전자통신연구원 부호화된 피승수를 사용하는 고정 소수점 곱셈 장치 및 그방법
US7188133B2 (en) * 2002-06-20 2007-03-06 Matsushita Electric Industrial Co., Ltd. Floating point number storage method and floating point arithmetic device
US8073892B2 (en) * 2005-12-30 2011-12-06 Intel Corporation Cryptographic system, method and multiplier
US7519646B2 (en) * 2006-10-26 2009-04-14 Intel Corporation Reconfigurable SIMD vector processing system
US8706790B1 (en) * 2009-03-03 2014-04-22 Altera Corporation Implementing mixed-precision floating-point operations in a programmable integrated circuit device
US20120191955A1 (en) * 2011-01-20 2012-07-26 Jonsson Ragnar H Method and system for floating point acceleration on fixed point digital signal processors
US20130339417A1 (en) * 2012-06-14 2013-12-19 International Business Machines Corporation Residue-based exponent flow checking
CN104166535B (zh) * 2013-07-19 2017-07-28 郑州宇通客车股份有限公司 定点处理器及其防溢方法
US20150095396A1 (en) * 2013-10-01 2015-04-02 Rockwell Automation Technologies, Inc. Multiplying varying fixed-point binary numbers
CN112148249B (zh) * 2020-09-18 2023-08-18 北京百度网讯科技有限公司 点积运算实现方法、装置、电子设备及存储介质

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3508038A (en) * 1966-08-30 1970-04-21 Ibm Multiplying apparatus for performing division using successive approximate reciprocals of a divisor
US3670956A (en) * 1968-09-26 1972-06-20 Hughes Aircraft Co Digital binary multiplier employing sum of cross products technique
US3873820A (en) * 1974-01-31 1975-03-25 Ibm Apparatus for checking partial products in iterative multiply operations
US4130879A (en) * 1977-07-15 1978-12-19 Honeywell Information Systems Inc. Apparatus for performing floating point arithmetic operations using submultiple storage
US4208722A (en) * 1978-01-23 1980-06-17 Data General Corporation Floating point data processing system
US4228520A (en) * 1979-05-04 1980-10-14 International Business Machines Corporation High speed multiplier using carry-save/propagate pipeline with sparse carries
US4338675A (en) * 1980-02-13 1982-07-06 Intel Corporation Numeric data processor
US4366548A (en) * 1981-01-02 1982-12-28 Sperry Corporation Adder for exponent arithmetic
US4523210A (en) * 1982-06-11 1985-06-11 Sperry Corporation Fast error checked multibit multiplier
US4528640A (en) * 1982-07-13 1985-07-09 Sperry Corporation Method and a means for checking normalizing operations in a computer device

Also Published As

Publication number Publication date
EP0132646A3 (en) 1987-04-15
AR241060A2 (es) 1991-04-30
AR241060A1 (es) 1991-04-30
US4594679A (en) 1986-06-10
EP0132646A2 (de) 1985-02-13
JPH0414366B2 (de) 1992-03-12
BR8401796A (pt) 1985-03-19
JPS6027026A (ja) 1985-02-12
EP0132646B1 (de) 1991-01-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee