DE3483430D1 - Anschlussfleck fuer wechselnde zwischenverbindungen zur verwendung auf einem keramiksubstrat fuer die aufnahme integrierter schaltungschips. - Google Patents

Anschlussfleck fuer wechselnde zwischenverbindungen zur verwendung auf einem keramiksubstrat fuer die aufnahme integrierter schaltungschips.

Info

Publication number
DE3483430D1
DE3483430D1 DE8484101444T DE3483430T DE3483430D1 DE 3483430 D1 DE3483430 D1 DE 3483430D1 DE 8484101444 T DE8484101444 T DE 8484101444T DE 3483430 T DE3483430 T DE 3483430T DE 3483430 D1 DE3483430 D1 DE 3483430D1
Authority
DE
Germany
Prior art keywords
terminal
integrated circuit
ceramic substrate
circuit chips
receiving integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8484101444T
Other languages
German (de)
English (en)
Inventor
Irving Feinberg
Sudipta Kumar Ray
Leo Yuan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3483430D1 publication Critical patent/DE3483430D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0286—Programmable, customizable or modifiable circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
DE8484101444T 1983-02-22 1984-02-14 Anschlussfleck fuer wechselnde zwischenverbindungen zur verwendung auf einem keramiksubstrat fuer die aufnahme integrierter schaltungschips. Expired - Lifetime DE3483430D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US46826283A 1983-02-22 1983-02-22

Publications (1)

Publication Number Publication Date
DE3483430D1 true DE3483430D1 (de) 1990-11-29

Family

ID=23859102

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484101444T Expired - Lifetime DE3483430D1 (de) 1983-02-22 1984-02-14 Anschlussfleck fuer wechselnde zwischenverbindungen zur verwendung auf einem keramiksubstrat fuer die aufnahme integrierter schaltungschips.

Country Status (3)

Country Link
EP (1) EP0116927B1 (OSRAM)
JP (1) JPS59201456A (OSRAM)
DE (1) DE3483430D1 (OSRAM)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5060116A (en) * 1990-04-20 1991-10-22 Grobman Warren D Electronics system with direct write engineering change capability
JP2674553B2 (ja) * 1995-03-30 1997-11-12 日本電気株式会社 半導体装置
JP5160295B2 (ja) * 2008-04-30 2013-03-13 ルネサスエレクトロニクス株式会社 半導体装置及び検査方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3691290A (en) * 1970-12-14 1972-09-12 Ibm Deletable conductor line structure
US4245273A (en) * 1979-06-29 1981-01-13 International Business Machines Corporation Package for mounting and interconnecting a plurality of large scale integrated semiconductor devices
US4489364A (en) * 1981-12-31 1984-12-18 International Business Machines Corporation Chip carrier with embedded engineering change lines with severable periodically spaced bridging connectors on the chip supporting surface

Also Published As

Publication number Publication date
EP0116927A3 (en) 1987-02-04
EP0116927B1 (en) 1990-10-24
JPS59201456A (ja) 1984-11-15
JPH0232788B2 (OSRAM) 1990-07-23
EP0116927A2 (en) 1984-08-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee