DE3427015C2 - - Google Patents

Info

Publication number
DE3427015C2
DE3427015C2 DE3427015A DE3427015A DE3427015C2 DE 3427015 C2 DE3427015 C2 DE 3427015C2 DE 3427015 A DE3427015 A DE 3427015A DE 3427015 A DE3427015 A DE 3427015A DE 3427015 C2 DE3427015 C2 DE 3427015C2
Authority
DE
Germany
Prior art keywords
layer
masking
holes
flexible
conductive layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE3427015A
Other languages
German (de)
English (en)
Other versions
DE3427015A1 (de
Inventor
Hirofumi Ibaraki Jp Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Mektron KK
Original Assignee
Nippon Mektron KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Mektron KK filed Critical Nippon Mektron KK
Priority to DE19843427015 priority Critical patent/DE3427015A1/de
Priority to EP84109587A priority patent/EP0169265B1/de
Priority to DE8484109587T priority patent/DE3475157D1/de
Publication of DE3427015A1 publication Critical patent/DE3427015A1/de
Application granted granted Critical
Publication of DE3427015C2 publication Critical patent/DE3427015C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/428—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0191—Using tape or non-metallic foil in a process, e.g. during filling of a hole with conductive paste
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0502—Patterning and lithography
    • H05K2203/054—Continuous temporary metal layer over resist, e.g. for selective electroplating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • H05K3/4691—Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Chemically Coating (AREA)
DE19843427015 1984-07-21 1984-07-21 Verfahren zur herstellung von durchkontaktierungen in gedruckten schaltungen Granted DE3427015A1 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE19843427015 DE3427015A1 (de) 1984-07-21 1984-07-21 Verfahren zur herstellung von durchkontaktierungen in gedruckten schaltungen
EP84109587A EP0169265B1 (de) 1984-07-21 1984-08-11 Verfahren zur Herstellung von Durchkontaktierungen in gedruckten Schaltungen
DE8484109587T DE3475157D1 (en) 1984-07-21 1984-08-11 Process for making printed-circuit boards with plated through-holes

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19843427015 DE3427015A1 (de) 1984-07-21 1984-07-21 Verfahren zur herstellung von durchkontaktierungen in gedruckten schaltungen

Publications (2)

Publication Number Publication Date
DE3427015A1 DE3427015A1 (de) 1986-01-30
DE3427015C2 true DE3427015C2 (enrdf_load_stackoverflow) 1987-10-15

Family

ID=6241281

Family Applications (2)

Application Number Title Priority Date Filing Date
DE19843427015 Granted DE3427015A1 (de) 1984-07-21 1984-07-21 Verfahren zur herstellung von durchkontaktierungen in gedruckten schaltungen
DE8484109587T Expired DE3475157D1 (en) 1984-07-21 1984-08-11 Process for making printed-circuit boards with plated through-holes

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE8484109587T Expired DE3475157D1 (en) 1984-07-21 1984-08-11 Process for making printed-circuit boards with plated through-holes

Country Status (2)

Country Link
EP (1) EP0169265B1 (enrdf_load_stackoverflow)
DE (2) DE3427015A1 (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1216135B (it) * 1988-03-18 1990-02-22 Sits Soc It Telecom Siemens Dielettrico mediante deposizioni in processo per la realizzazione di vuoto di metalli, e relativo fori metallizzati in un substrato prodotto ottenuto.
CN107645854A (zh) * 2017-09-21 2018-01-30 台州学院 一种多层柔性电路板形成过孔连接的方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB854881A (en) * 1956-12-04 1960-11-23 Emi Ltd Improvements in or relating to methods of forming conducting coatings on walls extending into insulating supports
DE1665771C2 (de) * 1966-09-30 1975-05-28 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung gedruckter Schaltungsplatten
CA939831A (en) * 1969-03-27 1974-01-08 Frederick W. Schneble (Jr.) Plated through hole printed circuit boards
DE1924775B2 (de) * 1969-05-14 1971-06-09 Verfahren zur herstellung einer leiterplatte
US4104111A (en) * 1977-08-03 1978-08-01 Mack Robert L Process for manufacturing printed circuit boards
JPS5932915B2 (ja) * 1981-07-25 1984-08-11 「弐」夫 甲斐 スル−ホ−ルを有する配線基板製造方法

Also Published As

Publication number Publication date
EP0169265A2 (de) 1986-01-29
EP0169265B1 (de) 1988-11-09
EP0169265A3 (en) 1986-07-02
DE3475157D1 (en) 1988-12-15
DE3427015A1 (de) 1986-01-30

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8330 Complete disclaimer