DE3380543D1 - Semiconductor memory devices with word line discharging circuits - Google Patents
Semiconductor memory devices with word line discharging circuitsInfo
- Publication number
- DE3380543D1 DE3380543D1 DE8383303859T DE3380543T DE3380543D1 DE 3380543 D1 DE3380543 D1 DE 3380543D1 DE 8383303859 T DE8383303859 T DE 8383303859T DE 3380543 T DE3380543 T DE 3380543T DE 3380543 D1 DE3380543 D1 DE 3380543D1
- Authority
- DE
- Germany
- Prior art keywords
- word line
- semiconductor memory
- memory devices
- line discharging
- discharging circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000007599 discharging Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
- G11C11/415—Address circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57116055A JPS598191A (ja) | 1982-07-02 | 1982-07-02 | 遅延放電回路 |
JP57233779A JPS59124756A (ja) | 1982-12-29 | 1982-12-29 | 半導体メモリ |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3380543D1 true DE3380543D1 (en) | 1989-10-12 |
Family
ID=26454438
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8383303859T Expired DE3380543D1 (en) | 1982-07-02 | 1983-07-01 | Semiconductor memory devices with word line discharging circuits |
Country Status (3)
Country | Link |
---|---|
US (1) | US4604728A (de) |
EP (1) | EP0100160B1 (de) |
DE (1) | DE3380543D1 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4864539A (en) * | 1987-01-15 | 1989-09-05 | International Business Machines Corporation | Radiation hardened bipolar static RAM cell |
JP2533399B2 (ja) * | 1990-05-25 | 1996-09-11 | 三菱電機株式会社 | センスアンプ |
US5222045A (en) * | 1990-05-25 | 1993-06-22 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device operable with power supply voltage variation |
JPH0442495A (ja) * | 1990-06-07 | 1992-02-13 | Mitsubishi Electric Corp | 半導体記憶装置 |
AU2002252593A1 (en) | 2001-04-05 | 2002-10-21 | Hyun-Jin Cho | Data restore in thyristor-based memory |
US7376008B2 (en) * | 2003-08-07 | 2008-05-20 | Contour Seminconductor, Inc. | SCR matrix storage device |
US8093107B1 (en) | 2005-06-22 | 2012-01-10 | T-Ram Semiconductor, Inc. | Thyristor semiconductor memory and method of manufacture |
US7894256B1 (en) | 2005-06-22 | 2011-02-22 | T-Ram Semiconductor, Inc. | Thyristor based memory cell |
US7894255B1 (en) | 2005-06-22 | 2011-02-22 | T-Ram Semiconductor, Inc. | Thyristor based memory cell |
US7460395B1 (en) * | 2005-06-22 | 2008-12-02 | T-Ram Semiconductor, Inc. | Thyristor-based semiconductor memory and memory array with data refresh |
US20070189067A1 (en) * | 2006-02-15 | 2007-08-16 | Francis Goodwin | Dynamic memory |
DE102015004824A1 (de) * | 2015-04-14 | 2016-10-20 | Infineon Technologies Ag | Verfahren und Vorrichtung zum Steuern von Strom in einer Array-Zelle |
CN115173535B (zh) * | 2022-09-08 | 2023-01-24 | 苏州浪潮智能科技有限公司 | 一种储能模块的放电电路、备电能力确定方法及相关组件 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5341968A (en) * | 1976-09-29 | 1978-04-15 | Hitachi Ltd | Semiconductor circuit |
US4168490A (en) * | 1978-06-26 | 1979-09-18 | Fairchild Camera And Instrument Corporation | Addressable word line pull-down circuit |
JPS5831673B2 (ja) * | 1979-08-22 | 1983-07-07 | 富士通株式会社 | 半導体記憶装置 |
JPS5637884A (en) * | 1979-08-30 | 1981-04-11 | Fujitsu Ltd | Terminating circuit for word selective signal line of semiconductor memory unit |
JPS5831674B2 (ja) * | 1979-12-19 | 1983-07-07 | 株式会社日立製作所 | メモリ |
-
1983
- 1983-07-01 DE DE8383303859T patent/DE3380543D1/de not_active Expired
- 1983-07-01 EP EP83303859A patent/EP0100160B1/de not_active Expired
- 1983-07-01 US US06/510,349 patent/US4604728A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US4604728A (en) | 1986-08-05 |
EP0100160A2 (de) | 1984-02-08 |
EP0100160A3 (en) | 1986-04-23 |
EP0100160B1 (de) | 1989-09-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB2128830B (en) | Semiconductor memory device | |
DE3380004D1 (en) | Semiconductor memory device | |
EP0096359A3 (en) | Semiconductor memory device | |
DE3379360D1 (en) | Semiconductor memory device having active pull-up circuits | |
DE3370092D1 (en) | Semiconductor memory device | |
EP0095721A3 (en) | Semiconductor memory device | |
DE3377436D1 (en) | Semiconductor memory device | |
DE3380543D1 (en) | Semiconductor memory devices with word line discharging circuits | |
GB8320218D0 (en) | Semiconductor memory device | |
EP0071470A3 (en) | Semiconductor memory devices including line driver circuits | |
DE3374103D1 (en) | Semiconductor memory device | |
DE3379366D1 (en) | Semiconductor memory device | |
DE3278055D1 (en) | Semiconductor memory devices | |
DE3376704D1 (en) | Semiconductor memory device | |
DE3379812D1 (en) | Memory circuit with noise preventing means for word lines | |
EP0098079A3 (en) | Semiconductor memory device with redundancy decoder circuit | |
EP0098215A3 (en) | Semiconductor memory device | |
EP0098165A3 (en) | Semiconductor memory device | |
DE3380717D1 (en) | A static type semiconductor memory device including a word line discharging circuit | |
DE3175993D1 (en) | Semiconductor device comprising memory circuits | |
DE3278865D1 (en) | Semiconductor memory devices | |
DE3377600D1 (en) | Semiconductor memory device | |
DE3364334D1 (en) | Semiconductor memory device | |
GB8302010D0 (en) | Semiconductor memory device | |
DE3375748D1 (en) | Semiconductor memory device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |