DE3380378D1 - Semiconductor device comprising dielectric isolation regions - Google Patents

Semiconductor device comprising dielectric isolation regions

Info

Publication number
DE3380378D1
DE3380378D1 DE8383109585T DE3380378T DE3380378D1 DE 3380378 D1 DE3380378 D1 DE 3380378D1 DE 8383109585 T DE8383109585 T DE 8383109585T DE 3380378 T DE3380378 T DE 3380378T DE 3380378 D1 DE3380378 D1 DE 3380378D1
Authority
DE
Germany
Prior art keywords
semiconductor device
isolation regions
dielectric isolation
dielectric
regions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383109585T
Other languages
English (en)
Inventor
Yoichi Tamaki
Takeo Shiba
Kazuhiko Sagara
Masao Kawamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of DE3380378D1 publication Critical patent/DE3380378D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/763—Polycrystalline semiconductor regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Element Separation (AREA)
  • Bipolar Transistors (AREA)
  • Drying Of Semiconductors (AREA)
DE8383109585T 1982-09-29 1983-09-26 Semiconductor device comprising dielectric isolation regions Expired DE3380378D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57168355A JPS5958838A (ja) 1982-09-29 1982-09-29 半導体装置

Publications (1)

Publication Number Publication Date
DE3380378D1 true DE3380378D1 (en) 1989-09-14

Family

ID=15866532

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383109585T Expired DE3380378D1 (en) 1982-09-29 1983-09-26 Semiconductor device comprising dielectric isolation regions

Country Status (4)

Country Link
EP (1) EP0111651B1 (de)
JP (1) JPS5958838A (de)
KR (1) KR900007149B1 (de)
DE (1) DE3380378D1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60103642A (ja) * 1983-11-11 1985-06-07 Hitachi Ltd 半導体装置およびその製造方法
JPS61187344A (ja) * 1985-02-15 1986-08-21 Nippon Telegr & Teleph Corp <Ntt> 半導体装置
IT1189143B (it) * 1986-05-16 1988-01-28 Sgs Microelettronica Spa Procedimento per la realizzazione dell'isolamento di circuiti integrati a elevatissima scala d'integrazione,in particolare in tecnologia mos e cmos
JPS6381831A (ja) * 1986-09-25 1988-04-12 Matsushita Electric Ind Co Ltd 半導体集積回路の製造方法
US4793654A (en) * 1987-02-09 1988-12-27 Hirosuke Takafuji Chair with height-adjustable seat
JP2641781B2 (ja) * 1990-02-23 1997-08-20 シャープ株式会社 半導体素子分離領域の形成方法
US5254491A (en) * 1991-09-23 1993-10-19 Motorola, Inc. Method of making a semiconductor device having improved frequency response
JPH07235537A (ja) * 1994-02-23 1995-09-05 Mitsubishi Electric Corp 表面が平坦化された半導体装置およびその製造方法
JP6270706B2 (ja) * 2014-12-11 2018-01-31 トヨタ自動車株式会社 半導体装置とその製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS519586A (en) * 1974-07-12 1976-01-26 Fujitsu Ltd Handotaisochino seizohoho
JPS54590A (en) * 1977-06-03 1979-01-05 Hitachi Ltd Element isolating method
JPS5534442A (en) * 1978-08-31 1980-03-11 Fujitsu Ltd Preparation of semiconductor device
DE2949360A1 (de) * 1978-12-08 1980-06-26 Hitachi Ltd Verfahren zur herstellung einer oxidierten isolation fuer integrierte schaltungen
US4238278A (en) * 1979-06-14 1980-12-09 International Business Machines Corporation Polycrystalline silicon oxidation method for making shallow and deep isolation trenches
US4318751A (en) * 1980-03-13 1982-03-09 International Business Machines Corporation Self-aligned process for providing an improved high performance bipolar transistor
EP0048175B1 (de) * 1980-09-17 1986-04-23 Hitachi, Ltd. Halbleiterbauelement und Verfahren zu dessen Herstellung

Also Published As

Publication number Publication date
JPS5958838A (ja) 1984-04-04
EP0111651B1 (de) 1989-08-09
EP0111651A3 (en) 1986-02-05
KR900007149B1 (ko) 1990-09-29
KR840005919A (ko) 1984-11-19
EP0111651A2 (de) 1984-06-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: STREHL, P., DIPL.-ING. DIPL.-WIRTSCH.-ING. SCHUEBEL-HOPF, U., DIPL.-CHEM. DR.RER.NAT. GROENING, H., DIPL.-ING., PAT.-ANWAELTE, 8000 MUENCHEN

8339 Ceased/non-payment of the annual fee