DE3278652D1 - Semiconductor memory device including a wordline discharge - Google Patents

Semiconductor memory device including a wordline discharge

Info

Publication number
DE3278652D1
DE3278652D1 DE8282303981T DE3278652T DE3278652D1 DE 3278652 D1 DE3278652 D1 DE 3278652D1 DE 8282303981 T DE8282303981 T DE 8282303981T DE 3278652 T DE3278652 T DE 3278652T DE 3278652 D1 DE3278652 D1 DE 3278652D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
device including
wordline discharge
wordline
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282303981T
Other languages
German (de)
English (en)
Inventor
Keizo Aoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3278652D1 publication Critical patent/DE3278652D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/418—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
DE8282303981T 1981-07-29 1982-07-28 Semiconductor memory device including a wordline discharge Expired DE3278652D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56118613A JPS5819794A (ja) 1981-07-29 1981-07-29 半導体メモリ

Publications (1)

Publication Number Publication Date
DE3278652D1 true DE3278652D1 (en) 1988-07-14

Family

ID=14740876

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282303981T Expired DE3278652D1 (en) 1981-07-29 1982-07-28 Semiconductor memory device including a wordline discharge

Country Status (5)

Country Link
US (1) US4516224A (https=)
EP (1) EP0071470B1 (https=)
JP (1) JPS5819794A (https=)
DE (1) DE3278652D1 (https=)
IE (1) IE54004B1 (https=)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4617652A (en) * 1979-01-24 1986-10-14 Xicor, Inc. Integrated high voltage distribution and control systems
JPS59174023A (ja) * 1983-03-24 1984-10-02 Toshiba Corp 超大規模集積回路
JPS60182096A (ja) * 1984-02-29 1985-09-17 Fujitsu Ltd 半導体記憶装置
JPS61242390A (ja) * 1985-04-19 1986-10-28 Matsushita Electronics Corp ワ−ド線駆動回路
JPH0612612B2 (ja) * 1987-03-06 1994-02-16 株式会社東芝 半導体記憶装置
US5161121A (en) * 1988-06-27 1992-11-03 Oki Electric Industry Co., Ltd. Random access memory including word line clamping circuits
JPH02277887A (ja) * 1989-04-14 1990-11-14 Toray Ind Inc 防汚性布帛
US5132936A (en) * 1989-12-14 1992-07-21 Cypress Semiconductor Corporation MOS memory circuit with fast access time
JP2507164B2 (ja) * 1990-10-04 1996-06-12 三菱電機株式会社 半導体記憶装置
KR950006352B1 (ko) * 1992-12-31 1995-06-14 삼성전자주식회사 정류성 전송 게이트와 그 응용회로
JP2001014858A (ja) 1999-06-29 2001-01-19 Toshiba Corp メモリ装置及びカップリングノイズ除去装置
EP1684303B1 (en) * 2005-01-12 2010-04-07 Infineon Technologies AG Pulse controlled word line driver
US8072834B2 (en) * 2005-08-25 2011-12-06 Cypress Semiconductor Corporation Line driver circuit and method with standby mode of operation
US20070165479A1 (en) * 2006-01-17 2007-07-19 Norbert Rehm Local wordline driver scheme to avoid fails due to floating wordline in a segmented wordline driver scheme
US9928898B2 (en) * 2016-03-30 2018-03-27 Qualcomm Incorporated Wordline adjustment scheme

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52155928A (en) * 1976-06-21 1977-12-24 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device
JPS5567993A (en) * 1978-11-14 1980-05-22 Fujitsu Ltd Semiconductor memory unit
DE2855866C3 (de) * 1978-12-22 1981-10-29 Ibm Deutschland Gmbh, 7000 Stuttgart Verfahren und Schaltungsanordnung zum Betreiben eines integrierten Halbleiterspeichers
JPS55150189A (en) * 1979-05-10 1980-11-21 Nec Corp Memory circuit
JPS5619585A (en) * 1979-07-26 1981-02-24 Toshiba Corp Semiconductor memory unit
JPS5637884A (en) * 1979-08-30 1981-04-11 Fujitsu Ltd Terminating circuit for word selective signal line of semiconductor memory unit
DE3071976D1 (en) * 1979-11-28 1987-07-02 Fujitsu Ltd Semiconductor memory circuit device
JPS5782279A (en) * 1980-11-04 1982-05-22 Fujitsu Ltd Semiconductor storage device
US4404662A (en) * 1981-07-06 1983-09-13 International Business Machines Corporation Method and circuit for accessing an integrated semiconductor memory

Also Published As

Publication number Publication date
EP0071470A3 (en) 1984-12-27
JPS6239518B2 (https=) 1987-08-24
US4516224A (en) 1985-05-07
EP0071470A2 (en) 1983-02-09
JPS5819794A (ja) 1983-02-04
IE821831L (en) 1983-01-29
IE54004B1 (en) 1989-05-10
EP0071470B1 (en) 1988-06-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee