DE3175777D1 - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
DE3175777D1
DE3175777D1 DE8181304761T DE3175777T DE3175777D1 DE 3175777 D1 DE3175777 D1 DE 3175777D1 DE 8181304761 T DE8181304761 T DE 8181304761T DE 3175777 T DE3175777 T DE 3175777T DE 3175777 D1 DE3175777 D1 DE 3175777D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181304761T
Other languages
English (en)
Inventor
Atsushi Oritani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3175777D1 publication Critical patent/DE3175777D1/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419Read-write [R-W] circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
DE8181304761T 1980-10-15 1981-10-13 Semiconductor memory device Expired DE3175777D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55144161A JPS5851354B2 (ja) 1980-10-15 1980-10-15 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3175777D1 true DE3175777D1 (en) 1987-02-05

Family

ID=15355611

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8181304761T Expired DE3175777D1 (en) 1980-10-15 1981-10-13 Semiconductor memory device

Country Status (5)

Country Link
US (1) US4433393A (de)
EP (1) EP0050037B1 (de)
JP (1) JPS5851354B2 (de)
DE (1) DE3175777D1 (de)
IE (1) IE52691B1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5833739A (ja) * 1981-08-21 1983-02-28 Toshiba Corp バスライン駆動回路
JPS58220291A (ja) * 1982-06-15 1983-12-21 Nec Corp 信号伝般時間制御回路
JPH0770222B2 (ja) * 1984-06-04 1995-07-31 株式会社日立製作所 Mosスタテイツク型ram
US4636983A (en) * 1984-12-20 1987-01-13 Cypress Semiconductor Corp. Memory array biasing circuit for high speed CMOS device
JPS63166090A (ja) * 1986-12-26 1988-07-09 Toshiba Corp スタティック型メモリ
KR900006293B1 (ko) * 1987-06-20 1990-08-27 삼성전자 주식회사 씨모오스 디램의 데이터 전송회로
KR900004635B1 (ko) * 1987-06-27 1990-06-30 삼성반도체통신 주식회사 반도체 메모리장치의 충전 및 등화회로
JP2533399B2 (ja) * 1990-05-25 1996-09-11 三菱電機株式会社 センスアンプ
US5222045A (en) * 1990-05-25 1993-06-22 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device operable with power supply voltage variation
JP3068426B2 (ja) * 1994-12-21 2000-07-24 日本電気株式会社 半導体記憶装置
US7888962B1 (en) 2004-07-07 2011-02-15 Cypress Semiconductor Corporation Impedance matching circuit
US8036846B1 (en) 2005-10-20 2011-10-11 Cypress Semiconductor Corporation Variable impedance sense architecture and method

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3936810A (en) * 1975-01-20 1976-02-03 Semi, Inc. Sense line balancing circuit
JPS53117341A (en) * 1977-03-24 1978-10-13 Toshiba Corp Semiconductor memory
JPS54106137A (en) * 1978-02-08 1979-08-20 Nippon Telegr & Teleph Corp <Ntt> Semiconductor memory device
JPS6037554B2 (ja) * 1978-04-06 1985-08-27 日本電気株式会社 記憶装置
JPS6027113B2 (ja) * 1980-02-13 1985-06-27 日本電気株式会社 プリチャ−ジ装置

Also Published As

Publication number Publication date
JPS5851354B2 (ja) 1983-11-16
JPS5769586A (en) 1982-04-28
IE812413L (en) 1982-04-15
IE52691B1 (en) 1988-01-20
EP0050037A2 (de) 1982-04-21
EP0050037A3 (en) 1984-10-10
US4433393A (en) 1984-02-21
EP0050037B1 (de) 1986-12-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition