DE3163340D1 - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
DE3163340D1
DE3163340D1 DE8181100607T DE3163340T DE3163340D1 DE 3163340 D1 DE3163340 D1 DE 3163340D1 DE 8181100607 T DE8181100607 T DE 8181100607T DE 3163340 T DE3163340 T DE 3163340T DE 3163340 D1 DE3163340 D1 DE 3163340D1
Authority
DE
Germany
Prior art keywords
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8181100607T
Other languages
English (en)
Inventor
Noboru Hirakawa
Tohru Tsujide
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP907080A external-priority patent/JPS56107575A/ja
Priority claimed from JP55009069A external-priority patent/JPS60781B2/ja
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3163340D1 publication Critical patent/DE3163340D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/005—Circuit means for protection against loss of information of semiconductor storage devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/15—Static random access memory [SRAM] devices comprising a resistor load element
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G11C11/4125—Cells incorporating circuit means for protecting against loss of information
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H01L23/556—Protection against radiation, e.g. light or electromagnetic waves against alpha rays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
DE8181100607T 1980-01-29 1981-01-28 Semiconductor device Expired DE3163340D1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP907080A JPS56107575A (en) 1980-01-29 1980-01-29 Manufacture of semicondutor device
JP55009069A JPS60781B2 (ja) 1980-01-29 1980-01-29 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3163340D1 true DE3163340D1 (en) 1984-06-07

Family

ID=26343724

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8181100607T Expired DE3163340D1 (en) 1980-01-29 1981-01-28 Semiconductor device

Country Status (3)

Country Link
US (1) US4590508A (de)
EP (1) EP0033159B1 (de)
DE (1) DE3163340D1 (de)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4532609A (en) * 1982-06-15 1985-07-30 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor memory device
EP0316307A1 (de) * 1982-06-15 1989-05-17 Kabushiki Kaisha Toshiba Halbleiterspeicheranordnung
JPS5916370A (ja) * 1982-07-19 1984-01-27 Toshiba Corp 半導体記憶装置
JPS59143331A (ja) * 1983-01-31 1984-08-16 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 半導体構造体
JPS61127159A (ja) * 1984-11-26 1986-06-14 Nippon Texas Instr Kk スタテイツク形記憶素子
JP2559360B2 (ja) * 1984-11-28 1996-12-04 株式会社日立製作所 半導体メモリ装置
JPH0685431B2 (ja) * 1985-06-10 1994-10-26 株式会社日立製作所 半導体装置
JP2523488B2 (ja) * 1986-04-18 1996-08-07 株式会社日立製作所 半導体記憶装置
JPS6341048A (ja) * 1986-08-06 1988-02-22 Mitsubishi Electric Corp 標準セル方式大規模集積回路
US4903094A (en) * 1986-08-26 1990-02-20 General Electric Company Memory cell structure having radiation hardness
US4833644A (en) * 1986-08-26 1989-05-23 General Electric Company Memory cell circuit having radiation hardness
US4760557A (en) * 1986-09-05 1988-07-26 General Electric Company Radiation hard memory cell circuit with high inverter impedance ratio
US4809226A (en) * 1987-10-28 1989-02-28 The United States Of America As Represented By The United States Department Of Energy Random access memory immune to single event upset using a T-resistor
US5075570A (en) * 1987-11-25 1991-12-24 Honeywell Inc. Switching state retention circuit having a feedback loop stabilizing capacitance
JPH01143252A (ja) * 1987-11-27 1989-06-05 Nec Corp 半導体装置
US4984200A (en) * 1987-11-30 1991-01-08 Hitachi, Ltd. Semiconductor circuit device having a plurality of SRAM type memory cell arrangement
US4866498A (en) * 1988-04-20 1989-09-12 The United States Department Of Energy Integrated circuit with dissipative layer for photogenerated carriers
US5124774A (en) * 1990-01-12 1992-06-23 Paradigm Technology, Inc. Compact SRAM cell layout
US5303190A (en) * 1992-10-27 1994-04-12 Motorola, Inc. Static random access memory resistant to soft error
US5377139A (en) * 1992-12-11 1994-12-27 Motorola, Inc. Process forming an integrated circuit
KR100305123B1 (ko) * 1992-12-11 2001-11-22 비센트 비.인그라시아, 알크 엠 아헨 정적랜덤액세스메모리셀및이를포함하는반도체장치
US5363328A (en) * 1993-06-01 1994-11-08 Motorola Inc. Highly stable asymmetric SRAM cell
US5452246A (en) * 1993-06-02 1995-09-19 Fujitsu Limited Static semiconductor memory device adapted for stabilization of low-voltage operation and reduction in cell size
US5504703A (en) * 1995-02-01 1996-04-02 Loral Federal Systems Company Single event upset hardened CMOS latch circuit
US5838044A (en) * 1995-12-12 1998-11-17 Advanced Micro Devices Integrated circuit having improved polysilicon resistor structures
US5700707A (en) * 1996-06-13 1997-12-23 Chartered Semiconductor Manufacturing Pte Ltd. Method of manufacturing SRAM cell structure having a tunnel oxide capacitor
US5721167A (en) * 1997-02-10 1998-02-24 Motorola, Inc. Process for forming a semiconductor device and a static-random-access memory cell
DE59812336D1 (de) * 1997-07-18 2005-01-05 Infineon Technologies Ag Integrierte schaltungsanordnung und verfahren zu deren herstellung
JP3655770B2 (ja) * 1999-03-29 2005-06-02 日本電気株式会社 光受信回路
JP5889734B2 (ja) * 2012-07-03 2016-03-22 ルネサスエレクトロニクス株式会社 半導体装置
JP6669752B2 (ja) 2015-07-23 2020-03-18 株式会社半導体エネルギー研究所 表示装置、モジュール、及び電子機器

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3657614A (en) * 1970-06-15 1972-04-18 Westinghouse Electric Corp Mis array utilizing field induced junctions
US4110776A (en) * 1976-09-27 1978-08-29 Texas Instruments Incorporated Semiconductor integrated circuit with implanted resistor element in polycrystalline silicon layer
US4130892A (en) * 1977-01-03 1978-12-19 Rockwell International Corporation Radiation hard memory cell and array thereof
US4240097A (en) * 1977-05-31 1980-12-16 Texas Instruments Incorporated Field-effect transistor structure in multilevel polycrystalline silicon
US4180826A (en) * 1978-05-19 1979-12-25 Intel Corporation MOS double polysilicon read-only memory and cell
US4258378A (en) * 1978-05-26 1981-03-24 Texas Instruments Incorporated Electrically alterable floating gate memory with self-aligned low-threshold series enhancement transistor
DE2912439A1 (de) * 1979-03-29 1980-10-16 Standard Elektrik Lorenz Ag Integrierter halbleiterschaltkreis mit integrierten speicherkapazitaeten

Also Published As

Publication number Publication date
EP0033159A2 (de) 1981-08-05
US4590508A (en) 1986-05-20
EP0033159A3 (en) 1981-08-19
EP0033159B1 (de) 1984-05-02

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