DE3069568D1 - A decoder circuit - Google Patents

A decoder circuit

Info

Publication number
DE3069568D1
DE3069568D1 DE8080304234T DE3069568T DE3069568D1 DE 3069568 D1 DE3069568 D1 DE 3069568D1 DE 8080304234 T DE8080304234 T DE 8080304234T DE 3069568 T DE3069568 T DE 3069568T DE 3069568 D1 DE3069568 D1 DE 3069568D1
Authority
DE
Germany
Prior art keywords
decoder circuit
decoder
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8080304234T
Other languages
English (en)
Inventor
Setsuo Kurafuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3069568D1 publication Critical patent/DE3069568D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/001Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits characterised by the elements used
    • H03M7/005Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits characterised by the elements used using semiconductor devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4085Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4087Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/08Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/10Decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/18Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Static Random-Access Memory (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Dram (AREA)
DE8080304234T 1979-11-29 1980-11-26 A decoder circuit Expired DE3069568D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54154580A JPS5828676B2 (ja) 1979-11-29 1979-11-29 デコ−ダ回路

Publications (1)

Publication Number Publication Date
DE3069568D1 true DE3069568D1 (en) 1984-12-06

Family

ID=15587315

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8080304234T Expired DE3069568D1 (en) 1979-11-29 1980-11-26 A decoder circuit

Country Status (6)

Country Link
US (1) US4446386A (de)
EP (1) EP0030118B1 (de)
JP (1) JPS5828676B2 (de)
CA (1) CA1167117A (de)
DE (1) DE3069568D1 (de)
IE (1) IE50517B1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59135690A (ja) * 1982-12-27 1984-08-03 Fujitsu Ltd デコ−ダ回路
FR2591789B1 (fr) * 1985-12-17 1988-02-19 Labo Electronique Physique Circuit decodeur pour memoire ram statique
JPS6366789A (ja) * 1986-09-09 1988-03-25 Mitsubishi Electric Corp Cmos行デコ−ダ回路
JP2598081B2 (ja) * 1988-05-16 1997-04-09 株式会社東芝 半導体メモリ
US5450027A (en) * 1994-04-08 1995-09-12 At&T Corp. Low-power-dissipation CMOS circuits
FR2724483B1 (fr) * 1994-09-12 1996-12-27 Sgs Thomson Microelectronics Procede de decodage d'adresse dans une memoire en circuit integre et circuit memoire mettant en oeuvre le procede
US5572150A (en) * 1995-04-10 1996-11-05 International Business Machines Corporation Low power pre-discharged ratio logic

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1502270A (en) * 1974-10-30 1978-03-01 Hitachi Ltd Word line driver circuit in memory circuit
JPS51139247A (en) * 1975-05-28 1976-12-01 Hitachi Ltd Mos logic circuit
JPS6023432B2 (ja) * 1977-12-09 1985-06-07 株式会社日立製作所 Mosメモリ
JPS5481046A (en) * 1977-12-12 1979-06-28 Fujitsu Ltd Decoder circuit
JPS5484936A (en) * 1977-12-20 1979-07-06 Fujitsu Ltd Decoder circuit

Also Published As

Publication number Publication date
JPS5828676B2 (ja) 1983-06-17
IE50517B1 (en) 1986-04-30
US4446386A (en) 1984-05-01
EP0030118B1 (de) 1984-10-31
EP0030118A2 (de) 1981-06-10
JPS5677983A (en) 1981-06-26
EP0030118A3 (en) 1982-03-03
CA1167117A (en) 1984-05-08

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee