DE2861463D1 - Arrangement for packing high-speed integrated circuits, including decoupling capacitors for the power input terminals, and method for realizing it. - Google Patents

Arrangement for packing high-speed integrated circuits, including decoupling capacitors for the power input terminals, and method for realizing it.

Info

Publication number
DE2861463D1
DE2861463D1 DE7878100332T DE2861463T DE2861463D1 DE 2861463 D1 DE2861463 D1 DE 2861463D1 DE 7878100332 T DE7878100332 T DE 7878100332T DE 2861463 T DE2861463 T DE 2861463T DE 2861463 D1 DE2861463 D1 DE 2861463D1
Authority
DE
Germany
Prior art keywords
realizing
arrangement
integrated circuits
input terminals
power input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE7878100332T
Other languages
English (en)
Inventor
Ven Young Doo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE2861463D1 publication Critical patent/DE2861463D1/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/642Capacitive arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15172Fan-out arrangement of the internal vias
    • H01L2924/15173Fan-out arrangement of the internal vias in a single layer of the multilayer substrate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49121Beam lead frame or beam lead device
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147Assembling terminal to base

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
DE7878100332T 1977-07-15 1978-07-07 Arrangement for packing high-speed integrated circuits, including decoupling capacitors for the power input terminals, and method for realizing it. Expired DE2861463D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/815,951 US4153988A (en) 1977-07-15 1977-07-15 High performance integrated circuit semiconductor package and method of making

Publications (1)

Publication Number Publication Date
DE2861463D1 true DE2861463D1 (en) 1982-02-18

Family

ID=25219264

Family Applications (1)

Application Number Title Priority Date Filing Date
DE7878100332T Expired DE2861463D1 (en) 1977-07-15 1978-07-07 Arrangement for packing high-speed integrated circuits, including decoupling capacitors for the power input terminals, and method for realizing it.

Country Status (6)

Country Link
US (1) US4153988A (de)
EP (1) EP0000384B1 (de)
JP (1) JPS5421170A (de)
CA (1) CA1090002A (de)
DE (1) DE2861463D1 (de)
IT (1) IT1109828B (de)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4526784A (en) * 1981-05-05 1985-07-02 Bayer Aktiengesellschaft Amino-cyclitol derivatives and medicaments containing them
US4453176A (en) * 1981-12-31 1984-06-05 International Business Machines Corporation LSI Chip carrier with buried repairable capacitor with low inductance leads
US4672421A (en) * 1984-04-02 1987-06-09 Motorola, Inc. Semiconductor packaging and method
GB8417785D0 (en) * 1984-07-12 1984-08-15 Pfizer Ltd Polycyclic ether antibiotic
US4816967A (en) * 1984-11-14 1989-03-28 Itt Gallium Arsenide Technology Center A Division Of Itt Corporation Low impedance interconnect method and structure for high frequency IC such as GaAs
US4945399A (en) * 1986-09-30 1990-07-31 International Business Machines Corporation Electronic package with integrated distributed decoupling capacitors
US4744008A (en) * 1986-11-18 1988-05-10 International Business Machines Corporation Flexible film chip carrier with decoupling capacitors
US4808273A (en) * 1988-05-10 1989-02-28 Avantek, Inc. Method of forming completely metallized via holes in semiconductors
US4842699A (en) * 1988-05-10 1989-06-27 Avantek, Inc. Method of selective via-hole and heat sink plating using a metal mask
US4978639A (en) * 1989-01-10 1990-12-18 Avantek, Inc. Method for the simultaneous formation of via-holes and wraparound plating on semiconductor chips
US5112683A (en) * 1990-10-30 1992-05-12 Chomerics, Inc. High temperature resistance mask
US5120572A (en) * 1990-10-30 1992-06-09 Microelectronics And Computer Technology Corporation Method of fabricating electrical components in high density substrates
US5254493A (en) * 1990-10-30 1993-10-19 Microelectronics And Computer Technology Corporation Method of fabricating integrated resistors in high density substrates
JP2766920B2 (ja) * 1992-01-07 1998-06-18 三菱電機株式会社 Icパッケージ及びその実装方法
DE4219031C2 (de) * 1992-06-10 1994-11-10 Siemens Ag Multi-Chip-Modul mit Kondensator, der auf dem Träger aus Silizium (monokristalines Substrat) realisiert ist
US5404265A (en) * 1992-08-28 1995-04-04 Fujitsu Limited Interconnect capacitors
US5351163A (en) * 1992-12-30 1994-09-27 Westinghouse Electric Corporation High Q monolithic MIM capacitor
US5629835A (en) * 1994-07-19 1997-05-13 Olin Corporation Metal ball grid array package with improved thermal conductivity
US5726498A (en) * 1995-05-26 1998-03-10 International Business Machines Corporation Wire shape conferring reduced crosstalk and formation methods
US5708559A (en) * 1995-10-27 1998-01-13 International Business Machines Corporation Precision analog metal-metal capacitor
US5822856A (en) * 1996-06-28 1998-10-20 International Business Machines Corporation Manufacturing circuit board assemblies having filled vias
US5770875A (en) * 1996-09-16 1998-06-23 International Business Machines Corporation Large value capacitor for SOI
US5955704A (en) * 1996-11-21 1999-09-21 Dell U.S.A., L.P. Optimal PWA high density routing to minimize EMI substrate coupling in a computer system
DE19851458C2 (de) 1998-11-09 2000-11-16 Bosch Gmbh Robert Monolithisch integrierte Schaltung mit mehreren, einen Nebenschluß nach Masse bildenden Kapazitäten und Verstärkerschaltung
US6777320B1 (en) * 1998-11-13 2004-08-17 Intel Corporation In-plane on-chip decoupling capacitors and method for making same
SG82591A1 (en) * 1998-12-17 2001-08-21 Eriston Technologies Pte Ltd Bumpless flip chip assembly with solder via
JP3647307B2 (ja) * 1999-04-19 2005-05-11 キヤノン株式会社 プリント配線基板および電子機器
JP2001356136A (ja) * 2000-06-15 2001-12-26 Advantest Corp 集積化マイクロコンタクトピン及びその製造方法
KR100480784B1 (ko) * 2002-01-19 2005-04-06 삼성전자주식회사 동축 케이블을 구비한 SMD(Surface Mounted Device) 형태의 패키지 제조 방법
JP4138529B2 (ja) * 2003-02-24 2008-08-27 浜松ホトニクス株式会社 半導体装置、及びそれを用いた放射線検出器
US7081650B2 (en) * 2003-03-31 2006-07-25 Intel Corporation Interposer with signal and power supply through vias
US7652896B2 (en) * 2004-12-29 2010-01-26 Hewlett-Packard Development Company, L.P. Component for impedance matching
JP4912992B2 (ja) * 2007-09-12 2012-04-11 新光電気工業株式会社 キャパシタ内蔵基板及びその製造方法
US8097946B2 (en) * 2007-10-31 2012-01-17 Sanyo Electric Co., Ltd. Device mounting board, semiconductor module, and mobile device
DE102014004660A1 (de) 2014-02-10 2015-08-13 Joachim Kümmel Verfahren zur Verbrennung von Abfall und Biomassen auf einem luftgekühlten Rost sowie Vorrichtung zur Durchführung des Verfahrens
DE102014008858A1 (de) 2014-06-16 2015-12-17 Joachim Kümmel Verfahren zur Verbrennung von Abfall und Biomassen auf einem Flossenwand-Stufenrost sowie Vorrichtung zur Durchführung des Verfahrens
CN107196145B (zh) * 2017-05-05 2019-07-30 番禺得意精密电子工业有限公司 屏蔽连接器的制造方法
CN108585443B (zh) * 2018-05-11 2021-01-12 彩虹集团有限公司 一种g8.5h基板玻璃池炉使用的电极水冷板及其制作方法
US10999917B2 (en) * 2018-09-20 2021-05-04 Apple Inc. Sparse laser etch anodized surface for cosmetic grounding
TW202119877A (zh) * 2019-11-05 2021-05-16 南韓商普因特工程有限公司 多層配線基板及包括其的探針卡

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3049647A (en) * 1958-09-02 1962-08-14 Sylvania Electric Prod Electrical chassis
US3191098A (en) * 1960-05-26 1965-06-22 Lockheed Aircraft Corp Structurally integrated capacitor assembly
US3351816A (en) * 1965-02-04 1967-11-07 Bunker Ramo Planar coaxial circuitry
GB1249108A (en) * 1967-10-02 1971-10-06 Electrosil Ltd Electric circuit assemblies
US3529212A (en) * 1967-12-26 1970-09-15 Corning Glass Works Printed circuit assembly
DE1765507A1 (de) * 1968-05-30 1971-09-30 Siemens Ag Steckvorrichtung mit kurzen Signalweglaengen
US3530411A (en) * 1969-02-10 1970-09-22 Bunker Ramo High frequency electronic circuit structure employing planar transmission lines
JPS547196B2 (de) * 1971-08-26 1979-04-04
US3922479A (en) * 1971-09-15 1975-11-25 Bunker Ramo Coaxial circuit construction and method of making
DE2238594A1 (de) * 1972-08-05 1974-02-21 Stettner & Co Keramischer mehrfach-durchfuehrungskondensator
DE2523913C3 (de) * 1975-05-30 1980-06-26 Siemens Ag, 1000 Berlin Und 8000 Muenchen Stromversorgungsnetzwerk zur Speisung einer Vielzahl integrierter Schaltkreise
US4034469A (en) * 1976-09-03 1977-07-12 Ibm Corporation Method of making conduction-cooled circuit package

Also Published As

Publication number Publication date
US4153988A (en) 1979-05-15
CA1090002A (en) 1980-11-18
EP0000384B1 (de) 1981-12-30
JPS5710577B2 (de) 1982-02-26
IT1109828B (it) 1985-12-23
IT7824893A0 (it) 1978-06-23
JPS5421170A (en) 1979-02-17
EP0000384A1 (de) 1979-01-24

Similar Documents

Publication Publication Date Title
DE2861463D1 (en) Arrangement for packing high-speed integrated circuits, including decoupling capacitors for the power input terminals, and method for realizing it.
NO155319C (no) Koplingsstykke uten innfoeringskraft for en integrert kretspakke.
GB2102632B (en) Electronic components e.g. inductors
EP0030244A4 (de) Mos-vorrichtung mit substrat-vormagnetisierungs-erzeugerschaltung.
EP0166003A4 (de) Integrierte halbleiterschaltung.
GB1538015A (en) Integrated circuit packages
IT8123794A0 (it) Complesso di confezionamento per componenti elettrici e/o elettronici.
EP0022870A4 (de) Halbleiter-schaltung.
JPS5284938A (en) Logic circuit
EP0026233A4 (de) Integrierte halbleiterschaltung und verdrahtungsverfahren dafür.
EP0103645A4 (de) Schaltung zur erzeugung von impulsen.
CA1026469A (en) Integrated circuit chip carrier and method for forming the same
EP0102127A3 (en) R.f. circuit arrangement
GB2067014B (en) Method for forming voltage-invariant capacitors for mos type integrated circuit device
IL53203A (en) Distortion compensation circuit especially for intermodulation product reduction in t.w.t.
DE2857616D1 (en) Process for forming an integrated logic circuit comprising bipolar transistors, and integrated circuit formed by that process.
DE3067005D1 (en) Integrated circuit package
ES522542A0 (es) Tricotosa rectilinea perfeccionada, con accionamiento electronico.
IT8123795A0 (it) Complesso di confezionamento per componenti elettrici e/o elettronici.
NO164805C (no) Separerbar, todelt, induktiv kobler.
GB2053566B (en) Integrated circuit package
DE3071474D1 (en) Radiofrequency power divider, and radiofrequency devices, especially solid-state devices, using the same
JPS5342504A (en) Power circuit for telephone set or the like
CH614810A5 (en) Heat-removing can for electronic component
JPS5292476A (en) Integrated circuit package

Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee