DE2718122A1 - PROGRAMMABLE CONTROL (PC) - Google Patents

Description

ΊΊ 18122

PATENT ADVERTISEMENT uiPL.-ING. ULRI C H K I NKE LI N

7032 Sindelfingen -Auf dem Goldberg- Weimarer Str. 32/34 - Telfon 07031/86501

Telex 7265509 rose d

April 4th 1977 11,737

Industrial electronics company Dr. Ing.Walter Klaschka GmbH & Co., 7531 Tiefenbronn-Lehningen, Steineggerstrasse 1

PROGRAMMABLE CONTROL (PC)

The invention relates to a programmable controller (PC) with an oscillator a step counter, with an instruction memory with an arithmetic unit, with inputs, Outputs, timers, counters, registers and the like.

The VDI report provides an excellent presentation of the new state of the art "Programmable controls (PC) Association of German Engineers".

The well-known programmable controls work slowly, require a lot of storage space, can only process logical connections slowly and are expensive. They are prone to failure and difficult to expand.

The object of the invention is to provide a programmable controller that has all avoids these disadvantages.

According to the invention, this problem is solved by the following features:

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α) An oscillator controls a step counter with η (e.g. η = 12) outputs,

corresponding to 2 initial states.

b) The step counter controls an instruction memory with η inputs, the 2 Includes words with a word length of 16 bits.

c) The 16-bit command consists of four bits for the instruction for the arithmetic unit, four bits for an address target, four bits for an address column, four bits for one Address line.

d) The arithmetic unit is an arithmetic unit according to the German patent application P 27 036 733 of January 29, 1977.

e) The recipients of the addresses are inputs, timers, counters, registers, Outputs and data memory (flags).

f) Data memories, timers, counters, registers, inputs are with their output pages connected to the 1-bit DATA-IN line of the arithmetic unit and data memory, Outputs, timers, counters and registers are connected with their output sides to the 1-bit DATA-OUT line of the arithmetic unit.

If one compares the processor part, consisting of control unit and arithmetic unit, with such a unit programmable controller with a commercially available microprocessor with the Today, predominantly programmable control organs (PC) are built, then one comes to the following differences:

Micro-processors are available with 4-bit, 8-bit or 16-bit handling (processing). the However, the control according to the invention only requires 1-bit handling. Compared to this 1 bit is a very complex work of a microprocessor.

The second difference lies in the arithmetic unit. The microprocessor arithmetic unit is as

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ALU arithmetic unit (arithetical logical unit). The arithmetic unit according to the invention according to the patent application P 27 036 733, however, only an LU arithmetic unit k, d. H., the invention does not require any arithmetic. The disadvantage of the arithmetic unit of a microprocessor is that that it has a high intelligence in arithmetic and a very low one Intelligence in logic. In logic, such an arithmetic unit only has the Possibilities to process AND, OR or EXCLUSIVE OR. With this, however, the usual circuit diagrams cannot be processed directly in series, as is the case with the Invention is possible. In contrast, the invention has a very high level of intelligence Logic, d. H. realized in the logical connections. With just 9 instructions you can any link depth and width can be processed.

Thirdly, with microprocessors, links can only be made with several commands can be processed, with each command also consisting of several cycles. in the The microprocessor usually fetches the information from the periphery with the first command (Fetch command) and puts the information z. B. in the internal accumulator.

The actual arithmetic process is carried out in the arithmetic unit with a second command and then the tray z. B. accomplished in another register. There for everyone If the instruction also requires several cycles, the microprocessor will be slow for links, i. E. H. he needs several commands times several cycles for one Shortcut.

However, the control according to the invention brings about a link with only one Command in just one cycle. The control according to the invention is therefore very fast.

If one interprets the invention in such a way that it is exactly as fast as the known ones Processors, then the control is cheap, because you don't need any complex Driver stages such as before and after the instruction memory, before and after the inputs and outputs, before and after the data memory in order to make the control fast, as is necessary with the usual microprocessors. Since you are now responsible for processing the Links has time, there is also no need for jump commands to set the processing time abbreviated, as is customary with microprocessors. This eliminates the need for additional expensive registers in the processor.

A fourth difference is that the microprocessor uses complicated machine language with several tens of instructions needed. This leads firstly to an 8-bit wide command field for the instructions and secondly to a compiler or assembler for converting the application-oriented "link language" into machine language of the microprocessor.

This is not necessary with the invention. It's just a simple machine language with only nine instructions available and you can therefore make do with a 4-bit wide instruction field. In addition, you can use the invention with an application-oriented Linking language that is the same as the machine language, whereby the hexadecimal counting system, which is favorable for the 4-bit division, is used. Assembler or compilers are not required.

A fifth difference between a microprocessor and the invention is in Storage space requirements. As mentioned above, you need more than

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a machine instruction, i.e. also more than one instruction memory location, while the Invention requires only one instruction memory space for each link. aside from that requires the PC control with microprocessor because of the lack of commands for logical connections (only AND, OR, EXCLUSIVE OR) usually additional buffer spaces in the command and data memory in order to be able to process circuit diagrams. Man therefore has a lot more storage space. In the programmable according to the invention Control you only need the smallest possible number of memory locations, namely only one instruction memory space per link. This makes the structure of the instruction memory and also of the data memory particularly inexpensive. The invention can on it refrain from performing complicated maneuvers such as jump commands. The invention dispenses with such commands and therefore has a clear, inexpensive arrangement of the Tail unit.

The invention will now be described using an exemplary embodiment.

According to Fig. 1, an oscillator with 250 kHz is provided with a step counter

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12 outputs. 2 gives = 4096 steps. You take a step counter with 12 outputs if you get by with 4,096 ("4 k" - * steps. You make it larger or smaller if you get by with more or fewer steps. For example, a step counter with 16 outputs already gives 2 = 65,536 - ("65k" -) steps, which is by far sufficient for the most complex control systems.

An instruction memory location with a word length of 16 bits is assigned to each step. Since the commercially available command memories have already built-in decoders, it is sufficient to connect the outputs of the step counter to the inputs of the command memory. The size of the step counter and the size of the instruction memory will vary on a case-by-case basis

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adapted to the control problem. Only a few are needed for small controls hundred, for large controls, however, a few thousand steps.

In the embodiment with a pedometer of 12 outputs, one is used Instruction memory with 4 k bytes and each byte consists of a word with a length of 16 bits. In the middle of Fig. 1 it is indicated how these words are organized: the first 4 bits serve as instructions for the arithmetic unit. The next 4 bits give the address target the next 4 bits indicate the address column, the last 4 bits indicate the address line at.

If you use a step counter with 16 outputs, then you organize the command memory so that it has 65 k bytes and each byte consists of a word of 16 bits. The step counter then has 16 outputs, which results in 65, 536 steps. This matches with about 65k.

The invention preferably moves in the area η greater than 12.

The connection of the central unit with the peripheral components such as inputs, timers, Counters, registers, outputs are clearly described in FIG. 1 and need not be shown to become.

The arithmetic unit is structured like the German patent application P 27 036 733 from January 29, 1977 shows.

Fig. 2 shows the cyclical processing of the commands of the programmable according to the invention

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Steering . Here, the number of steps from 000 to FFF is 0 to 4 095.

The invention uses the hexadecimal notation. They simplify the structure and understanding of the control system is considerable. 3 shows the relationship between binary, decimal and hexadecimal numbers. The hexadecimal notation uses the numbers 0 to 9 of the decimal system instead the numbers 0 to 15. Instead of the two-digit numbers 10 to 15, however, the Letters A through F of the alphabet. With this trick you can get by with only one digit in the hexadecimal system. This considerably simplifies the representation of numbers. For example, 15 = F, 255 = FF, 4 095 = FFF, etc.

Not only the steps, but also every command is entered in hexadecimal. As already explained at the beginning, in the larger version each command has a word length of 16 bit - 4 χ 4 bit = 4 digit ίη hexadecimal notation.

Fig. 4 shows the three digits of the steps, structured in hexadecimal, as well as the hexadecimal Structure of the commands, structured according to instructions for the arithmetic unit and address, whereby the address is again subdivided into target, column and line.

When looking at Fig. 2 and Fig. 4 you can see the basic structure of the Programming language based on a command. On the left you can see the 3 digit steps, on the right the 4 digit commands.

As already stated in the introduction and also described in patent application P 27 036 733

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you get by with 9 instructions. The relationship between the instruction (first Command digit) and the hexadecimal number is shown in Fig. 5. By typing the letter "A" assigning the instruction "and invert", the letters "a" and "A" provide a direct connection, and by adding the letter "C" to the instruction "Connect invert ", an assignment is also obtained by the letters" c "and "C". This could be deepened by adding the letter "B" to the instruction "begin invert" assigns.

The operation of the control is now additionally explained using an example: First of all a command is invoked and that command gives a hack instruction, which is one of possible can be nine statements. At the same time, the address of an assigned input or output element is called up. The called member gives its data information via the DATA-IN line to the calculator or via the DATA-OUT line to one of the issues. The outputs may not only include the outputs shown in Fig. 1, but also timers, counters and registers, as well as the one shown there Data storage. This 1-bit information is processed in the arithmetic unit, namely in a single cycle. The control group according to FIG. 6 is now to be processed. You start in step 000 with the command 1 B 00, where "1" = "start". then one moves in step 001 according to the rule from left to right and from above to below to B 16, where the number "4" stands for "Connect", because here it is direct is connected and receives the command 4 B 16. You then go to the next step 002 continue via D 02 with the instruction return invert and the command BD 02 to the next step 003 and to the next connect instruction for B 7 A (command CB 7 A) and you end this instruction set in step 004 with the instruction out for D 02,

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arso the command 5 D02. As you can see, this is the application-oriented link language identical to the machine language.

The letter B is used for the input destinations and the letter D for the output destinations, which follows on from the previous notation, in which \ a was also B for actuators and input contacts and D was used for internal contactors. This is easily made possible by the hexadecimal notation.

7 shows the assignment of the destinations to the individual devices. A device has 128 inputs or outputs. The top two devices are necessary if you need 256 inputs / outputs. With the six additional devices, you get a maximum of 1,024 inputs / outputs.
On the right in Fig. 7 are the associated destinations B, D, respectively; A, C; 1, 4; 2, 5 indicated.

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Claims (4)

737 d Claims (Jy programmable controller (PC) with an oscillator, with a step counter, with an instruction memory, with an arithmetic unit and with inputs, outputs, timers, counters, registers and the like, characterized by the following Characteristics: a) An oscillator controls a step counter with η (e.g. η = 12) outputs, corresponding to 2 steps. b) The step counter controls serially an instruction memory with η inputs, which ^{comprises 2 n} words with a word length of 4 × 4 = 16 bits. c) The 16-bit word comprises four bits for the instruction for the arithmetic unit, four bits for an address target, four bits for an address column, four bits for an address line. d) The arithmetic unit is an arithmetic unit according to the German patent application P 27 036 733 of January 29, 1977. e) The recipients of the addresses are inputs, timers, counters, registers, Outputs and data memory (flags). f) Data memories, timers, counters, registers, inputs are with their Output pages connected to the DATA-IN line of the arithmetic unit and Data memories, outputs, timers, counters and registers are connected with their output sides to the DATA-OUT line of the arithmetic unit. 2. Controller according to claim 1, characterized in that the instruction memory has a word length of 3x4 = 12 bits and these are divided into four bits 80984 W0161 ORIGINAL INSPECTED /! 710122 for the instructions for the arithmetic unit, four bits for the address targets, four bits for the address columns. 3. Control according to claim 1, characterized in that the machine command is also the programming language. 4. Control according to claim 1, characterized in that a link processed in just one command step and in just one cycle of the step counter will.