DE2711365C2 - - Google Patents

Description

The invention relates to a semiconductor arrangement with Schottky Boundary layer on a basic body made of silicon, in the the base body makes an ohmic contact on a first one Interface and the Schottky interface in the silicon forming metal film at a second interface owns.

Photo voltage arrangements, such as solar cells and photo detectors, can light, for example from the area of Infrared to ultraviolet, in usable electrical Convert energy. A problem in the field of solar cells is that because of the cost of the Solar energy generated by this process often not competitive with other types of production is. One of the largest expenditure items in solar cell manufacturing is the price of that used in the solar cells Semiconductor material. Of course, the price is one The more semiconductor material needed, the higher the solar cell becomes. A reduction in the semiconductor material required for photodetector arrays would also cost reduce. If the same semiconductor material current rectifier properties has in the dark, so could it also in other semiconductor devices like diodes, Find use.

A solar cell and thus a semiconductor arrangement at the beginning genus mentioned in the US journal "Journal of Applied Physics ", Vol. 45, No. 9, Sept. 1974, pages 3913 to 3915. The active area of the known Solar cell is made of single crystal or silicon from a polycrystalline silicon film. The silicon  borders an electrically conductive substrate on a surface as an ohmic contact and on an opposite surface a metal film to form the Schottky boundary layer. The metal film should be at least semi-transparent to solar radiation be. It is suggested efficiency of solar cells with Schottky boundary layer through use layered or alloyed Schottky barrier layers to improve p-type silicon. At the same time Manufacturing costs can be reduced by replacing monocrystalline silicon is a polycrystalline thin film Silicon is provided.

From the GB magazine "Solid State Communications", Vol. 17, 1975, pages 1193 to 1196, it is known to be amorphous Silicon produced by decomposing silane in a high-frequency glow discharge is therefore substitutional to dope that the silane a dopant gas, e.g. B. hydrogen phosphide or diborane. Through the The choice of the doping should include the electronic properties of the growing, amorphous silicon can be controlled. The Silicon bodies discussed are consistently homogeneous, contacts are not described.

In the NL journal "Journal of Non-Crystalline Solids", Volume 13 (1973/74) pages 55 to 68, is given as the Photoconductivity and absorption by decomposition of Amorphous silicon pieces produced in a glow discharge from that prevailing when the silicon is deposited Substrate temperature may depend. The illustrated Components also contain homogeneous, amorphous silicon bodies.  

In the US journal "Applied Physics Letters", vol. 28, No 2, January 15, 1976, pages 105 to 107 is finally published the production of a thin-film component with amorphous Silicon body and in it when growing the silicon film generated PN transition described. This will make the PN transition manufactured that exposed to the glow discharge Silane first a donor gas and then an acceptor gas is added. As a result, it is found that the rectifying and photovoltaic sensitivity of the PN transition qualitatively similar to the corresponding values with a crystalline PN junction. Remarkably the indication that the properties associated with the PN transition can be observed in amorphous silicon, not by one or both of two possible Schottky Boundary layers on the contacts made of metal of the silicon body can be caused.

Because of the relatively low cost of manufacturing amorphous Silicon, you could try that in a thin layer Material to be produced by glow discharge in silane as Base body of a semiconductor arrangement mentioned above Art, so for example a solar cell, a photo detector or a rectifier. In a generic semiconductor arrangement that would mean the amorphous silicon layer on one side with a flat Ohmic contact and on the other hand with one equip planar barrier layer contact and the silicon body to train so that in him the operation of the Component, e.g. B. a solar cell, required space charge zone can arise.  

The invention has for its object a semiconductor device initially mentioned type using amorphous To create silicon for the silicon base body that all advantages of previous components with single crystal or Has polycrystalline silicon, but with less manufacturing effort and material to produce, and their Basic body in particular at the same time attaching a flat Ohmic contact and a flat junction contact enables.

The solution according to the invention consists in the semiconductor arrangement with an ohmic contact of a first interface and a junction contact at a second interface having silicon base body in that the Adjacent base body from one to the first interface the first layer of glow discharge in a Mi the production of silane and a dopant gas tated, amorphous silicon and from a glow charge in silane to one of the first interfaces opposite lying surface of the first layer second layer adjacent to the second interface.

It is achieved by the invention that the amorphous silicon Base body on the ohmic surface contact Doping surface relatively high and at the Area associated with junction contact is relatively weak or is not to be endowed. At the higher endowed Side can therefore form a barrier-free contact while a junction contact on the weakly doped side with a pronounced space charge zone within  of the silicon base body is to be produced. The gradient of dopants within the amorphous silicon Base body can when depositing the silicon by glow discharge from silane and optionally one Dopant gas are preferably controlled so that the electrical in silicon from the Schottky junction Field or the corresponding space charge is sufficient far for the operation of the component, e.g. B. as a solar cell, reaches in.

Based on the drawing of exemplary embodiments Invention explained in more detail. It shows

Fig. 1 shows a cross section of a first embodiment of a semiconductor device comprising Schottky barrier layer;

Fig. 2 is a graph of the absorption coefficient of single crystal silicon as compared to amorphous silicon produced by glow discharge, and that in the visible light region;

Figure 3 is a schematic representation of a first apparatus for producing amorphous silicon by glow discharge in silane.

Figure 4 is a schematic representation of a second apparatus for the production of amorphous silicon by glow discharge in silane.

Fig. 5 is a cross section of a second embodiment of a semiconductor device comprising Schottky barrier according to the invention.

A first exemplary embodiment of the semiconductor arrangement according to the present invention is designated by 10 in FIG. 1. The semiconductor arrangement 10 has a substrate 12 made of a material with good electrical conductivity properties. Typical materials with these properties are aluminum, chrome, stainless steel, niobium, tantalum, iron and indium tin oxide on glass.

A base body 13 made of amorphous silicon, which was produced by glow discharge in silane SiH₄, is applied to a surface of the substrate 12 . The deposition method known to those skilled in the art involves electrical discharge by gas at a relatively low pressure, for example around 5 torr or less, in a partially evacuated chamber. A glow discharge is characterized by several areas of diffuse, glowing glow, for example the positive glow column near the anode and the negative glow area between the anode and the negative glow area between the anode and cathode, and a voltage drop in the vicinity of the cathode, which has a much higher potential than the ionization potential of the gas, for example the Crookes dark room area.

Amorphous material is material that has no order larger ranges regarding the periodicity of the matrix having. Amorphous silicon caused by glow discharge  in silane, SiH₄, has an order in a small range of not more than 20 Å. The Lack of order over larger areas with amorphous, Silicon produced by glow discharge in silane can be determined by X-ray or electron diffraction will.

The body 13 has a first layer 14 made of amorphous silicon, which was produced by glow discharge in a mixture of silane and doping gas. The first layer 14 has an ohmic contact with the substrate 12 , a first interface 15 lying between the two. A second layer 16 of amorphous silicon within the body 13 is applied to the first layer 14 on the side facing away from the substrate 12 . The second layer 16 was made by glow discharge in silane, SiH₄, typically by glow discharge in substantially pure silane. Since the glow discharge takes place in substantially pure silane, it would be assumed that the second layer 16 is undoped, but it has been found that this second layer 16 , although made in pure silane, is slightly n-doped, for example when deposited on one Surface that has been heated to a temperature of more than 100 ° C. The first and second layers 14 and 16 are of the same conductivity type. The doping concentration of the first layer 14 preferably decreases such that it has a maximum at the interface 15 and decreases to an insignificant concentration at the interface of the first layer 14 with the second layer 16 . Although the first layer preferably has a stepped or decreasing doping concentration, the present invention also includes doping concentrations that are uniform through the entire layer 14 for reasons that will be explained below.

The amorphous silicon of the first and second layers 14 and 16 is formed by a glow discharge in silane plus a suitable doping gas for the layer 14 , and can be distinguished from other amorphous silicon in that it has the kinetic properties of an average density of states in the order of magnitude 10¹⁷ / CM³ or less. The average density of states is to be determined by recording the ratio of 1 to the squared capacitance (1 / C²) as a function of the voltage prevailing at the silicon semiconductor device. From the form of this record, experts can determine the average density of states. In the production of amorphous silicon by glow discharge in silane, the drift mobility for electrons is 10 ^-3 cm² / V-sec or more. The drift mobility of the electrons is measured by known means, whereby light impulses or electron beam impulses are impinged on the prestressed semiconductor arrangement, and the subsequent electron flow generated by the impulses is followed by a sample system. From measurements of the photoconductivity it has further been estimated that the order of magnitude of the lifetime of the electrons of amorphous silicon produced by the glow discharge in silane is in the order of 10 ^-5 seconds. Nevertheless, it can be assumed that amorphous silicon produced by glow discharge in silane and having an electron lifetime of the order of magnitude of 10 ^-7 sec or higher also has good electrical properties.

The first layer 14 is typically between 100 Å and about 0.5 micrometers thick, the second layer 16 between about 1/2 and 1 micrometers thick.

A metal film 18 is attached to an interface 20 on the surface of the second layer 16 facing away from the first layer 14 . The metal film 18 is at least semi-transparent to solar radiation when the arrangement is to be used as a solar cell, and is made of metal with good electrical conductivity and high normal potential, for example greater than 4.5 eV, ie a noble metal, assuming that the second Layer 16 is n-type. Metals with good electrical conductivity and high normal potential, ie a noble metal, are for example gold, silver, platinum, palladium, rhodium, iridium or chromium. The metal film 18 can consist of a single metal layer or of several layers. If the metal film 18 consists of multiple layers, a first layer of platinum could be on top of the second layer 16 and a second layer on the first layer of platinum could be gold or silver to achieve good electrical conductivity. As previously stated, in the case of a solar cell, the metal film 18 is at least semi-transparent to solar radiation and, because it is a metal, should be about 100 Å thick for this purpose.

The first layer is usually n-conducting, although the first layer of a Schottky arrangement according to the invention can of course also be p-conducting. If the first layer 14 is p-type, the second layer 16 is doped to be slightly p-type, and the metal film 18 is made of a metal with a low normal potential, ie a base metal, less than about 4.3 eV, generally aluminum.

An electrode 22 is arranged on a portion of the surface of the metal film 18 opposite the interface 20 . Typically, the electrode 22 is in the form of a grid, although it may also have other known shapes, for example a finger or a comb; the electrode is made of a metal with good electrical conductivity.

In the present exemplary embodiment of the invention, the electrode 22 has two sets of grid lines which run essentially parallel to one another and intersect the grid lines of the other arrangement. The electrode 22 takes up only a small area of the surface of the metal film 18 , for example about 5-10% of the surface of the film 18 , since the solar radiation impinging on the electrode 22 is to be reflected away from the arrangement 10 . The task of the electrode 22 consists in the uniform absorption of the current originating from the metal film 18 . The electrode 22 makes it easier to keep the series resistance of the assembly 20 low when it is in operation as part of the circuit. However, it can be assumed that only a single coulter share is necessary for uniform current consumption in the case of an arrangement with small surface areas, which can be designed in any known form, such as a finger or comb.

An anti-reflective layer 24 is attached to the electrode 22 and to the surface of the metal film 18 not covered by the electrode 22, which surface is opposite to the interface 20 . The antireflection layer 24 has an incident surface 26 on which the solar radiation 28 can strike. As is well known, an increase in solar radiation 28 which passes through the metal film 18 and penetrates the assembly 10 is obtained by keeping the thickness of the anti-reflective layer 24 on the order of λ / n , where λ is the wavelength of the incident surface 26 incident radiation, and n is the refractive index of the anti-reflection layer 24 . The refractive index n of the antireflection layer 24 should have a suitable value so that the amount of solar radiation 28 incident on the metal film 18 is increased. If, for example, the metal film 18 consists of platinum with a thickness of 100 Å, a suitable antireflection layer 24 could consist of zirconium oxide ZrO₂ of 500 Å thickness with n = 2.1. As a result, the anti-reflective layer 24 reduces the amount of light reflected by the assembly 10 . Normally, the anti-reflective layer 24 will be made of a dielectric material such as zinc sulfide, zirconium oxide or silicon nitride, but it can also be a transparent semiconducting material such as tin oxide which is doped with antimony or indium oxide doped with tin.

It is known that an interface junction, commonly known as a Schottky junction, is obtained as a result of contact of certain metals with certain semiconductor materials. In the Schottky arrangement 10 according to the present invention, the transition is formed by contacting the metal film 18 with the second layer 16 at the interface 20 . A Schottky barrier layer generates a space charge or an electric field in the semiconductor material of the arrangement 10 from the interface 20 , which penetrates into the second layer 16 ; this area is called the depletion or restricted area. As a result of the decreasing doping concentration in the first layer 14 , an electric field is also generated in this. As a result of the Schottky barrier layer at the interface 20 and the stepped, decreasing doping concentration of the first layer 14 , an electric field extends essentially through the first and second layers 14 and 16, respectively. It is preferred, at least for photo-voltage arrangements according to the present invention, that the electric field extends through both the first and the second layers 14 and 16 , respectively. With an electrical field extending through the first and second layers 14 and 16 , charge carriers generated anywhere within these layers become either the substrate 12 or the metal layer 18 as a result of the absorption of the solar radiation 28 by the electrical field deducted. The substrate 12 is one of the electrodes of the arrangement 10 . If the electrical field does not extend into a section of the first or the second layer 14 or 16 of the arrangement 10 , any charge carriers which are generated in this quasi-neutral section are not drawn off to an electrode with the aid of a field and are open Diffusion directed to the depletion area so that it can be caught. In addition, any quasi-neutral area contributes to series or series resistance when drawing current from the device, reducing the efficiency of the device.

While the decreasing doping concentration within the first layer 14 is advantageous for widening the electric field range of the arrangement 10 , an ohmic contact between the first layer 14 and the substrate 12 can also be formed more easily since the doping concentration at the first interface 15 has its maximum , and is, for example, on the order of 5 atomic%. The formation of an ohmic contact at the contact point 15 is advantageous in order to achieve a low series resistance for the semiconductor arrangement 10 . Even if there is a uniform doping concentration through the first layer 14 , an ohmic contact can be formed at the contact point 15 as long as the uniform doping concentration is of the order of 5 atom%.

The amorphous silicon of the first layer 14 , which was produced by glow discharge in silane plus doping gas, and the amorphous silicon of the second layer 16 , which was produced by glow discharge in silane, has properties that are ideally suited for photo-voltage arrangements. The electron lifetime in amorphous silicon, which was produced by glow discharge in silane, is estimated to be about 10 ^-5 sec, while the electron lifetime in amorphous silicon, which was obtained by sputtering or vapor deposition, is of the order of 10 ^-11 sec lies.

Measurements of the spectral sensitivity of the invention Arrangements show a high collection efficiency in the visible region of the spectrum, for example an average collecting efficiency in the spectral range from 4000 Å to 7000 Å in the order of 50%.

The light absorption in the visible range, ie from 4000 Å to 7000 Å, is higher than that of monocrystalline silicon in the case of amorphous silicon produced by glow discharge. In Fig. 2 it is shown that amorphous silicon has a larger absorption coefficient over the visible range than monocrystalline silicon. This means that a major part of glow discharge amorphous silicon can be thinner by a factor of 10 than monocrystalline silicon in order to achieve comparable light absorption in the visible range.

The average density of states also lies of glow discharge amorphous silicon on the order of 10¹⁷ / cm³ or less. The average density of states due to glow discharge generated amorphous silicon increases with increasing deposition temperature and growing purity of the silane in the manufacture and is much lower than that of amorphous silicon that was produced in a different way, for example by atomization or vapor deposition, the average density of states at 10¹⁹ / cm³ or above lies. It is striking that the density of states is reversed proportional to the square of the width of the depletion area is. Since the density of states in glow discharge amorphous silicon is relatively low, one can a depletion range of the order of 1 µm receive. Obvious for the average density of states near the center of the energy band is the fact that the life of the energy source is inversely proportional is the average density of states. this fact again confirms that the lifespan of the carriers of Amorphous silicon obtained by glow discharge higher is than that of amorphous silicon, which is characterized by the other method previously mentioned.

In Fig. 3 a form suitable for a glow discharge apparatus for manufacturing the semiconductor device 10 of the present invention is indicated generally at 30. The glow discharge device 30 contains a chamber 32 which is formed by a vacuum bell 34 , usually made of glass. An electrode 36 and a heating plate 38 are arranged in the vacuum chamber 32 at a distance therefrom and opposite the electrode 36 . The electrode 36 is made of metal with good electrical conductivity, such as platinum, and is in the form of a screen or a coil. The heating plate 38 consists of a ceramic frame with enclosed heating coils, which are fed by a power source 40 outside the vacuum chamber 32 .

A first outlet 44 in the vacuum chamber 32 is connected to a diffusion pump, a second outlet 46 is connected to a mechanical pump, and a third outlet 48 is connected to a gas supply which is the source of the various gases used during the glow discharge process represents. Although the second outlet 46 is described as being connected to a diffusion pump, it is assumed that a diffusion pump may not be necessary since the mechanical pump connected to the first outlet 44 can evacuate the system to a sufficient pressure.

In the manufacture of the semiconductor device 10 , the substrate 12 , for example stainless steel 304 , is arranged on the heating plate 38 and connected to a socket of the voltage source 42 , while the electrode 36 is connected to the opposite socket of the voltage source 42 . There is therefore a voltage potential between electrode 36 and substrate 12 . The voltage of the voltage source 42 can either be DC voltage or it can be in the low frequency range of, for example, 60 Hertz, or in the radio frequency range, for example in the high frequency range on the order of MHz. When the voltage source 42 provides DC power, the electrode 36 is typically connected to the positive socket of the voltage source 42 and the substrate 12 is connected to the negative socket of the voltage source 42 . Therefore, electrode 36 acts as an anode and substrate 12 acts as a cathode when voltage source 42 is turned on. This is called cathode direct current operation. However, in DC operation, substrate 12 and electrode 36 may also have reverse polarity, that is, substrate 12 is the anode and electrode 36 is the cathode, which is referred to as DC anode operation. It was found that the deposition rate in the cathode operation is somewhat higher than in the anode operation. In addition, a high-frequency glow discharge operation can be carried out in electrode-less glow discharge devices of a known type, for example in capacitive high-frequency glow discharge systems and inductive high-frequency glow discharge systems. However, a more uniform deposition over a large area, for example larger than 10 cm², is achieved with a glow discharge with direct current or low alternating current than with electrode-free high frequency. Next, the vacuum chamber 32 is usually also evacuated to a pressure of about 10 ^-3 to 10 ^-6 torr, and the substrate 12 is heated to a temperature in the range of 150 ° to 450 ° C, by heating the heating coils of the heating plates 38 with current provided.

Then an atmosphere of about 98.5% silane, SiH₄, and about 1.5% n-dopant gas is introduced into the vacuum chamber so that a pressure of 0.1 to 5 Torr is generated, and as a result, the substrate temperature increases to a value in the range from 200 ° C to 500 ° C. Usual n-type doping gases which can be used in glow discharge processes are phosphine, PH₃, and arsine AsH₃. Materials such as antimony Sb, bismuth Bi, sodium hydride NaH and cesium nitride CsN₃ can also be used by filling them in an evaporator boat and heating them in the atmosphere of the vacuum chamber 32 until the desired amount of doping gas or vapor is released into the silane atmosphere becomes.

In order to initiate the glow discharge between the electrode 36 and the substrate 12 , the voltage source 42 is switched on, as a result of which the deposition of the doped, amorphous silicon layer 14 begins. DC cathode operation is assumed. For the deposition of the first layer 14 , the current density should be on the order of 0.1 to 3.0 mA / cm 2 on the surface of the substrate 12 . The deposition rate of the amorphous silicon increases with the vapor pressure of the silane and the current density. At a pressure of 2 torr and a current density of 1 mA / cm² to the cathode substrate 12 at a temperature of 350 ° C., the deposition of about 200 Å doped amorphous silicon takes place in a few seconds. In order to graduate or decrease the doping concentration of the first layer 14 , additional silane is introduced into the vacuum chamber 32 during the glow discharge deposition.

Once glow discharge is initiated for DC cathode operation, electrons are emitted from substrate 12 and meet with SiH Sil silane molecules, both molecules being ionized and dissociated. The positive silicon ions and the positive silicon hydride ions SiH⁺ are attracted to the substrate 12 , which forms the cathode, whereby silicon, which contains some hydrogen, is deposited on the substrate 12 . The presence of hydrogen in amorphous silicon is believed to be beneficial for its electrical properties.

The atmosphere of the vacuum chamber 32 is then pumped out by the mechanical pump 46 .

When the vacuum chamber 32 has a pressure of about 10 ^-6 torr, substantially pure silane is introduced into the vacuum chamber 32 so that a pressure in the range of 0.1 to 5 torr is created. The glow discharge is again activated for 1 to 5 minutes at a current density of 0.3 mA / cm 2 to 3.0 mA / cm 2 on the first layer 14 for the deposition of the second layer 16 of amorphous silicon. It has been found that the second layer 16 of amorphous silicon, which is produced in essentially pure silane by glow discharge, is slightly n-conductive when it is deposited on the first layer 14 at a temperature above 100.degree.

The temperature of the substrate 12 in the glow discharge process can affect the composition and structure of the material deposited thereon due to effects of auto-doping, the formation of a eutectic and due to induced crystallization, ie this deposition on a single-crystal silicon substrate at temperatures above about 500 ° C results in deposition of polycrystalline silicon, and deposition on a gold substrate at temperatures above 186 ° C results in an induced crystallization of the deposited silicon.

After the first and second layers 14 and 16 have been deposited, the base body 13 can be subjected to a heat treatment in which it is exposed to a temperature in the range from 200 ° C. to 450 ° C. for five minutes to a few hours. It should be noted that the heat treatment takes several hours only at the lower temperatures.

Usually, the heat treatment can be carried out by leaving the base body 13 in the glow discharge device 30 after the glow process has ended, or by placing the plate in an oven of a generally known type. The heat treatment can take place either in a vacuum or in a molding gas atmosphere, ie 90% by volume of nitrogen and 10% by volume of oxygen, or in an atmosphere of pure nitrogen or pure oxygen. This process stage eliminates lattice defects in the base body 13 made of amorphous silicon and improves the efficiency of the arrangement.

Next, the base body 13 is placed in a known evaporation system and the metal film 18 is evaporated onto the second layer 16 . Similarly, electrode 22 and anti-reflective layer 24 are deposited on metal film 18 by known vapor deposition and masking techniques. The whole process can be carried out in a single installation which is set up for both glow discharge and evaporation.

It has also been found that the collection efficiency of the assembly 10 increases when it comprises a metal film 18 made of a material belonging to the group of chromium, iridium, rhodium, platinum or palladium and is subjected to a heat treatment during manufacture. The heat treatment can usually be carried out after the antireflection layer 24 has been deposited, or both before the deposition of the electrode 22 and after the deposition of the antireflection layer 24 . In particular, for the heat treatment, the semiconductor arrangement 10 can be introduced into a heat treatment chamber of a known type and subjected to a temperature between 150 ° C. and 250 ° C. for about 5 to 30 minutes. The heat treatment chamber can be evacuated or be under a shaped gas atmosphere, for example 90% by volume of nitrogen and 10% by volume of hydrogen or under an atmosphere of pure nitrogen or pure hydrogen. It has been found that this heat treatment increases efficiency by increasing the height of the Schottky barrier layer, improving the collection efficiency and reducing the effective series resistance of the device. The manufacture of the semiconductor device 10 is completed by connecting wire electrodes (not shown) to the substrate 12 and the electrode 22 for connection to external circuitry.

During operation of the semiconductor arrangement 10 , the substrate 12 can reflect non-absorbed solar radiation back into the first and second layers 14 and 16 , respectively, the possibility of beam absorption being improved.

FIG. 4 shows a second glow discharge device for producing the semiconductor arrangement 10 , which is designated by 130 . The device 130 is constructed similarly to the device 30 , in particular the vacuum chamber 132 , the vacuum bell 134 , the electrode 136 , the heating plate 138 , the current source 140 , the voltage source 142 , the first outlet 144 , the second outlet 146 and the third outlet 148 the device 130 is the same as the vacuum chamber 32 , the vacuum bell 34 , the electrode 36 , the heating plate 38 , the power source 40 , the voltage source 42 , the first outlet 44 , the second outlet 46 and the third outlet 48 in the device 30 . Unlike the device 30 , the device 130 has an electrode 149 which has the shape of a screen. The shield electrode 149 is made of an electrically conductive material, for example a metal such as stainless steel, and has openings which are smaller than the cathode dark space region of the glow discharge. The shield electrode 149 is arranged between the electrode 136 and the heating plate 138 at a distance above the substrate 12 which is of the order of magnitude of the cathode dark space region of the glow discharge. The operation of the device 130 differs from that of the device 30 in that the substrate 12 is not electrically connected to the voltage source 142 , but instead the shield electrode 142 . Therefore, the shield electrode 149 is connected to a socket of the voltage source 142 and the electrode 136 to the opposite socket. Assuming DC cathode operation, the positive ions in the glow discharge are attracted to the shield electrode 149 when the voltage source 142 is turned on. However, most positive ions will pass through the openings of the shield electrode 149 .

The device 130 with the shield electrode 149 can be used if the substrate 12 is an insulator on which no electrical contact is possible. However, the device 130 can also be used in the production of arrangements with amorphous silicon in which the substrate 12 is not an insulator.

The device 130 , like the device 30 , can be operated in direct current cathode or anode operation.

In Fig. 5, a second embodiment is shown of a semiconductor device comprising Schottky barrier or barrier layer according to the present invention and designated 110. The semiconductor arrangement 110 contains an electrically conductive substrate 112 . An intermediate layer 111 adjoins a surface of the substrate 112 , and a base body 113 adjoins this. The body 113 contains a first layer 114 on the intermediate layer 111 opposite the substrate 112 , and a second layer 116 on the first layer 114 opposite the substrate 112 . A semi-transparent metal film 118 is applied to the second layer 116 opposite the substrate 112 and forms an edge layer transition between the two. An electrode 122 is attached to a portion of the metal film 118 , while the remaining part of the metal film 118 is provided with an anti-reflection layer 124 . The substrate 112 , the first layer 114 , the second layer 116 , the metal film 118 , the electrode 122 and the anti-reflection layer 124 of the arrangement 110 are the same as the substrate 12 , the first layer 14 , the second layer 16 , the metal film 18 , the electrode 22 and the anti-reflection layer 24 of the semiconductor arrangement 10 . The only difference between semiconductor device 10 and the semiconductor device 110 is that the assembly 110 has an intermediate layer 111, which is not present in the arrangement of the tenth

The intermediate layer 111 consists of a material which brings about an ohmic contact both with the substrate 112 and with the first layer 114 . The intermediate layer 111 usually consists of doped amorphous germanium or a combination of doped amorphous germanium and silicon. For each of these materials, layer 111 is usually n-type if second layer 16 is slightly n-type. Amorphous germanium has been found to be a good material for making ohmic contact between doped amorphous silicon and metallic substrate 112 . In particular, if the substrate 112 is made of aluminum, the electrical conductivity between the first and second layers 114 and 116 of the arrangement 110 and the substrate 112 is better than the electrical conductivity between the first and second layers 14 and 16 of the arrangement 10 and the substrate 12 .

The operation of the device 110 is the same as that previously described for the semiconductor device 10 . The fabrication of the semiconductor device 110 is similar to that of the device 10 , except that the intermediate layer 111 is deposited on the substrate 112 by a glow discharge before the first layer 114 is produced by a glow discharge. Using an apparatus according to FIG. 3, the intermediate layer 111 is produced as follows: the substrate 112 is placed on the heating plate 138 , the substrate is heated to a temperature in the range from 150 ° C. to 450 ° C. and the chamber 132 is under pressure evacuated from about 0.5 to 1.0 x 10 ^-6 torr. Next, gases determined by the desired composition of the intermediate layer 111 are introduced into the chamber 132 up to a pressure of 0.1 to 5.0 torr. If the intermediate layer is to consist of doped germanium, the atmosphere contains about 60% germanium hydrogen GeH₄, 39.5% silane SiH₄ and about 0.5% doping gas, for example phosphine PH₃, which is n-conductive. The glow discharge is then initiated and continued for about two seconds to deposit an intermediate layer 111 approximately 200 Å thick. The atmosphere in the vacuum chamber 32 is then pumped out by the mechanical pump 46 . The remaining manufacture of semiconductor device 110 is the same as previously described for semiconductor device 10 .

Although the semiconductor arrays 10 and 110 according to the present invention have been described as solar cells, semiconductor arrays 10 and 110 can be used in the same way as a high-frequency photodetector, for example as an array which is responsive to radiant energy. It has been found that these photodetectors, in which a first layer of doped amorphous silicon adjoins a second layer of amorphous silicon made by glow discharge in silane, are highly sensitive to high frequencies on the order of 10 MHz and above . The amount of radiation energy striking the device when the semiconductor devices 10 and 110 are used as a photodetector is not as critical as when they are used as solar cells. For the function of the arrangements 10 and 110 as a photodetector, modifications are therefore possible without further ado, for example removing the antireflection layer and replacing the grid electrode with a contact console.

The use of glow discharge amorphous silicon in photo voltage and photo detector Arrangements according to the present invention enables thinner base body than when arranged with the same Basic structure, but with single crystal silicon. Orders, the amorphous silicon produced under glow discharge use are for solar radiation absorption suitable with that of photo voltage and Photodetector arrays using single crystal Silicon have been produced, comparable are whose base bodies are 10 times thicker. Hence the particular advantage of the present invention when used as a photo voltage or photo detector  Arrangement the cost reduction through use of thinner active areas. Furthermore can be used with the present invention as a photo voltage Arrangement also reduces production costs of electrical energy from solar radiation, because in the manufacture of the arrangements according to the present Less energy is consumed since the invention Manufacturing at lower temperatures than manufacturing single crystal arrangements; also can Solar cells with larger areas are manufactured in Comparison to solar cells using single crystal Orders.

It has also been found that semiconductor devices 10 and 110 are suitable for current rectification in the dark. For example, shows a Schottky assembly 10 with a stainless steel substrate 12 , with a uniform phosphor layer doped first layer 14 , with a palladium metal film 18 from 1000 Å to 2000 Å thick for electrical contact, and without the grid electrode 22 and the anti-reflection layer 24 has a rectification ratio of 10⁴ at ± 0.4 volts. Although the arrangements 10 and 110 are described as solar cells, they can also work as a current rectifier, it being understood that their effectiveness as a rectifier can be increased by minor modifications, for example removal of the antireflection layers.

The semiconductor device according to the present invention, the first layer of doped amorphous silicon and whose second layer consists of amorphous silicon, can either as a solar cell, as a photo detector or as Rectifiers work.

Claims (9)

1. A semiconductor arrangement with a Schottky boundary layer on a base body ( 13 ) made of silicon, in which the base body, an ohmic contact ( 12 ) at a first interface ( 15 ) and a metal film ( 18 ) forming the Schottky boundary layer in the silicon on one second interface ( 20 ), characterized in that the base body ( 13 )

• a) from a first layer ( 15 ) adjacent to the first layer ( 14 ) made of glow discharge in a mixture of silane and a dopant gas, doped, amorphous silicon and
• b) a second layer ( 16 ) deposited by a glow discharge in silane onto a surface of the first layer ( 14 ) opposite the first interface ( 15 ), adjacent to the second interface ( 20 )

consists. 2. Semiconductor arrangement according to claim 1, characterized in that that the first layer has n line. 3. A semiconductor arrangement according to claim 1 or 2, characterized in that the electrical contact of the first layer ( 14 ) consists of an electrically conductive substrate adjacent to this layer with ohmic contact. 4. Semiconductor arrangement according to one of claims 1 to 3, characterized in that the dopant concentration within the first layer ( 14 ) starting from a maximum at the ohmic contact first interface ( 15 ) towards its interface with the second layer ( 16 ) decreases. 5. Semiconductor arrangement according to claim 4, characterized in that the maximum dopant concentration in is of the order of 5 atomic%. 6. Semiconductor arrangement according to one of claims 1 to 5, characterized in that the dopant gas is hydrogen phosphide, Hydrogen arsenic, antimony, bismuth, sodium hydride or cesium nitride.   7. Semiconductor arrangement according to one of claims 1 to 6, characterized in that the base body ( 13 ) is annealed from amorphous silicon. 8. A method for producing a semiconductor arrangement according to one of claims 1 to 7, characterized by the following steps:

• a) forming a first layer ( 14 ) consisting of doped, amorphous silicon by glow discharge in a mixture of silane and a dopant gas;
• b) forming a second layer ( 16 ) made of amorphous silicon on the first layer ( 14 ) by glow discharge in silane; and
• c) annealing the first and second layers ( 14, 16 ) at a temperature of the order of 200 to 405 ° C for a period of a few minutes to several hours.