DE2644180C3 - Datenverarbeitungssystem - Google Patents

Datenverarbeitungssystem

Info

Publication number
DE2644180C3
DE2644180C3 DE2644180A DE2644180A DE2644180C3 DE 2644180 C3 DE2644180 C3 DE 2644180C3 DE 2644180 A DE2644180 A DE 2644180A DE 2644180 A DE2644180 A DE 2644180A DE 2644180 C3 DE2644180 C3 DE 2644180C3
Authority
DE
Germany
Prior art keywords
register
cycle
command
address
during
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2644180A
Other languages
German (de)
English (en)
Other versions
DE2644180B2 (de
DE2644180A1 (de
Inventor
Masahiko Tokio/Tokyo Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Publication of DE2644180A1 publication Critical patent/DE2644180A1/de
Publication of DE2644180B2 publication Critical patent/DE2644180B2/de
Application granted granted Critical
Publication of DE2644180C3 publication Critical patent/DE2644180C3/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
DE2644180A 1975-09-30 1976-09-30 Datenverarbeitungssystem Expired DE2644180C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50117906A JPS5242337A (en) 1975-09-30 1975-09-30 Data processing unit

Publications (3)

Publication Number Publication Date
DE2644180A1 DE2644180A1 (de) 1977-04-14
DE2644180B2 DE2644180B2 (de) 1978-12-21
DE2644180C3 true DE2644180C3 (de) 1985-10-03

Family

ID=14723109

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2644180A Expired DE2644180C3 (de) 1975-09-30 1976-09-30 Datenverarbeitungssystem

Country Status (3)

Country Link
US (1) US4093984A (enExample)
JP (1) JPS5242337A (enExample)
DE (1) DE2644180C3 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2855004A1 (de) * 1978-12-20 1980-07-03 Standard Elektrik Lorenz Ag Verfahren und system zur fehlererkennung in mikroprogrammierbaren mikroprozessorsystem
US4577282A (en) * 1982-02-22 1986-03-18 Texas Instruments Incorporated Microcomputer system for digital signal processing
US5983328A (en) * 1987-03-13 1999-11-09 Texas Instruments Incorporated Data processing device with time-multiplexed memory bus
JP3164915B2 (ja) * 1992-09-21 2001-05-14 株式会社日立製作所 データ処理装置及びそのデータ処理方法
US5907864A (en) * 1995-06-07 1999-05-25 Texas Instruments Incorporated Data processing device with time-multiplexed memory bus
CN117234696B (zh) * 2023-11-13 2024-01-19 北京控制工程研究所 高频率gnc系统多任务执行策略的确定方法及装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3962683A (en) * 1971-08-31 1976-06-08 Max Brown CPU programmable control system
US3766532A (en) * 1972-04-28 1973-10-16 Nanodata Corp Data processing system having two levels of program control

Also Published As

Publication number Publication date
JPS5444581B2 (enExample) 1979-12-26
US4093984A (en) 1978-06-06
JPS5242337A (en) 1977-04-01
DE2644180B2 (de) 1978-12-21
DE2644180A1 (de) 1977-04-14

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
8327 Change in the person/name/address of the patent owner

Owner name: KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP

8328 Change in the person/name/address of the agent

Free format text: BLUMBACH, P., DIPL.-ING., 6200 WIESBADEN WESER, W., DIPL.-PHYS. DR.RER.NAT. KRAMER, R., DIPL.-ING.,8000 MUENCHEN ZWIRNER, G., DIPL.-ING. DIPL.-WIRTSCH.-ING., 6200 WIESBADEN HOFFMANN, E., DIPL.-ING., PAT.-ANW., 8000 MUENCHEN