DE2553344C3 - - Google Patents
Info
- Publication number
- DE2553344C3 DE2553344C3 DE2553344A DE2553344A DE2553344C3 DE 2553344 C3 DE2553344 C3 DE 2553344C3 DE 2553344 A DE2553344 A DE 2553344A DE 2553344 A DE2553344 A DE 2553344A DE 2553344 C3 DE2553344 C3 DE 2553344C3
- Authority
- DE
- Germany
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19752553344 DE2553344B2 (de) | 1975-11-27 | 1975-11-27 | Verfahren zum betrieb eines speicherbausteins |
FR7635349A FR2333322A1 (fr) | 1975-11-27 | 1976-11-24 | Module de memoire |
IT29749/76A IT1064406B (it) | 1975-11-27 | 1976-11-25 | Componente memorizzatore con celle di memorizzazione a un transistore |
JP51142067A JPS5266342A (en) | 1975-11-27 | 1976-11-26 | Memory cell |
US05/745,239 US4136401A (en) | 1975-11-27 | 1976-11-26 | Storage module |
GB49643/76A GB1571300A (en) | 1975-11-27 | 1976-11-29 | Transistorised storage circuits |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19752553344 DE2553344B2 (de) | 1975-11-27 | 1975-11-27 | Verfahren zum betrieb eines speicherbausteins |
Publications (3)
Publication Number | Publication Date |
---|---|
DE2553344A1 DE2553344A1 (de) | 1977-06-08 |
DE2553344B2 DE2553344B2 (de) | 1977-09-29 |
DE2553344C3 true DE2553344C3 (de) | 1978-05-24 |
Family
ID=5962819
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19752553344 Granted DE2553344B2 (de) | 1975-11-27 | 1975-11-27 | Verfahren zum betrieb eines speicherbausteins |
Country Status (6)
Country | Link |
---|---|
US (1) | US4136401A (de) |
JP (1) | JPS5266342A (de) |
DE (1) | DE2553344B2 (de) |
FR (1) | FR2333322A1 (de) |
GB (1) | GB1571300A (de) |
IT (1) | IT1064406B (de) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4363111A (en) * | 1980-10-06 | 1982-12-07 | Heightley John D | Dummy cell arrangement for an MOS memory |
JPS5862893A (ja) * | 1981-10-09 | 1983-04-14 | Mitsubishi Electric Corp | Mosダイナミツクメモリ |
JPS58139399A (ja) * | 1982-02-15 | 1983-08-18 | Hitachi Ltd | 半導体記憶装置 |
JP2012160230A (ja) | 2011-01-31 | 2012-08-23 | Elpida Memory Inc | 半導体装置 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3983544A (en) * | 1975-08-25 | 1976-09-28 | International Business Machines Corporation | Split memory array sharing same sensing and bit decode circuitry |
-
1975
- 1975-11-27 DE DE19752553344 patent/DE2553344B2/de active Granted
-
1976
- 1976-11-24 FR FR7635349A patent/FR2333322A1/fr active Granted
- 1976-11-25 IT IT29749/76A patent/IT1064406B/it active
- 1976-11-26 US US05/745,239 patent/US4136401A/en not_active Expired - Lifetime
- 1976-11-26 JP JP51142067A patent/JPS5266342A/ja active Pending
- 1976-11-29 GB GB49643/76A patent/GB1571300A/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE2553344B2 (de) | 1977-09-29 |
JPS5266342A (en) | 1977-06-01 |
US4136401A (en) | 1979-01-23 |
FR2333322B3 (de) | 1980-10-17 |
FR2333322A1 (fr) | 1977-06-24 |
IT1064406B (it) | 1985-02-18 |
DE2553344A1 (de) | 1977-06-08 |
GB1571300A (en) | 1980-07-09 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C3 | Grant after two publication steps (3rd publication) | ||
8339 | Ceased/non-payment of the annual fee |